Shen Hongzhi, Ren Junwen, Li Junze, Chen Yingying, Lan Shangui, Wang Jiaqi, Wang Haizhen, Li Dehui
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China.
Wuhan National Laboratory for Optoelectronics, Huazhong University of Science and Technology, Wuhan 430074, China.
ACS Appl Mater Interfaces. 2020 Dec 30;12(52):58428-58434. doi: 10.1021/acsami.0c19443. Epub 2020 Dec 17.
The diversification of data types and the explosive increase of data size in the information era continuously required to miniaturize the memory devices with high data storage capability. Atomically thin two-dimensional (2D) transition metal dichalcogenides (TMDs) are promising candidates for flexible and transparent electronic and optoelectronic devices with high integration density. Multistate memory devices based on TMDs could possess high data storage capability with a large integration density and thus exhibit great potential applications in the field of data storage. Here, we report the multistate data storage based on multilayer tungsten diselenide (WSe) transistors by interface engineering. The multiple resistance states of the WSe transistors are achieved by applying different gate voltage pulses, and the switching ratio of the memory can be as large as 10 with high cycling endurance. The water and oxygen molecules (HO/O) trapped at the interface between the SiO substrate and WSe introduce the trap states and thus the large hysteresis of the transfer curves, which leads to the multistate data storage. In addition, the laminated Au thin film electrodes make the contact interface between the electrodes and WSe free of dangling bond and Fermi level pinning, thus giving rise to the excellent performance of memory devices. Importantly, the interface trap states can be easily controlled by a simple oxygen plasma treatment of the SiO substrate, and subsequently, the performance of the multistate memory devices can be manipulated. Our findings provide a simple and efficient strategy to engineer the interface states for the multistate data storage applications and would motivate more investigations on the trap state-associated applications.
在信息时代，数据类型的多样化和数据量的爆炸式增长不断要求将具有高数据存储能力的存储设备小型化。原子级超薄的二维（2D）过渡金属二硫属化物（TMD）是用于具有高集成密度的柔性透明电子和光电器件的有前途的候选材料。基于TMD的多态存储设备可以具有高数据存储能力和大集成密度，因此在数据存储领域展现出巨大的潜在应用。在此，我们通过界面工程报道基于多层二硒化钨（WSe）晶体管的多态数据存储。通过施加不同的栅极电压脉冲实现WSe晶体管的多个电阻状态，并且存储器的开关比可以高达10，具有高循环耐久性。捕获在SiO衬底和WSe之间界面处的水和氧分子（HO/O）引入了陷阱态，从而导致转移曲线的大滞后，这导致了多态数据存储。此外，层叠的金薄膜电极使电极与WSe之间的接触界面没有悬空键和费米能级钉扎，从而产生了存储器件的优异性能。重要的是，通过对SiO衬底进行简单的氧等离子体处理可以轻松控制界面陷阱态，随后，可以操纵多态存储器件的性能。我们的发现为多态数据存储应用的界面态工程提供了一种简单有效的策略，并将激发更多关于陷阱态相关应用的研究。
