Alam Shamiul, Hossain Md Shafayat, Aziz Ahmedullah
Department of Electrical Engineering and Computer Science, University of Tennessee, Knoxville, TN, 37996, USA.
Department of Electrical Engineering, Princeton University, Princeton, NJ, 08544, USA.
Sci Rep. 2021 Apr 12;11(1):7892. doi: 10.1038/s41598-021-87056-7.
The interplay between ferromagnetism and topological properties of electronic band structures leads to a precise quantization of Hall resistance without any external magnetic field. This so-called quantum anomalous Hall effect (QAHE) is born out of topological correlations, and is oblivious of low-sample quality. It was envisioned to lead towards dissipation-less and topologically protected electronics. However, no clear framework of how to design such an electronic device out of it exists. Here we construct an ultra-low power, non-volatile, cryogenic memory architecture leveraging the QAHE phenomenon. Our design promises orders of magnitude lower cell area compared with the state-of-the-art cryogenic memory technologies. We harness the fundamentally quantized Hall resistance levels in moiré graphene heterostructures to store non-volatile binary bits (1, 0). We perform the memory write operation through controlled hysteretic switching between the quantized Hall states, using nano-ampere level currents with opposite polarities. The non-destructive read operation is performed by sensing the polarity of the transverse Hall voltage using a separate pair of terminals. We custom design the memory architecture with a novel sensing mechanism to avoid accidental data corruption, ensure highest memory density and minimize array leakage power. Our design provides a pathway towards realizing topologically protected memory devices.
铁磁性与电子能带结构的拓扑性质之间的相互作用导致在没有任何外部磁场的情况下霍尔电阻的精确量子化。这种所谓的量子反常霍尔效应(QAHE)源于拓扑相关性,并且不受低样品质量的影响。人们设想它将引领无耗散且拓扑保护的电子学发展。然而,目前还不存在关于如何基于此设计这样一种电子器件的清晰框架。在此,我们利用量子反常霍尔效应现象构建了一种超低功耗、非易失性的低温存储器架构。与最先进的低温存储技术相比,我们的设计有望使单元面积降低几个数量级。我们利用莫尔石墨烯异质结构中基本量子化的霍尔电阻水平来存储非易失性二进制位(1, 0)。我们通过使用具有相反极性的纳安级电流在量子化霍尔状态之间进行受控的滞后切换来执行存储器写入操作。非破坏性读取操作是通过使用单独的一对端子感测横向霍尔电压的极性来执行的。我们采用新颖的传感机制定制设计存储器架构,以避免意外的数据损坏,确保最高的存储密度并使阵列泄漏功耗最小化。我们的设计为实现拓扑保护的存储器件提供了一条途径。