Thoti Narasimhulu, Li Yiming
Parallel and Scientific Computing Laboratory, National Yang Ming Chiao Tung University, Hsinchu 30010, Taiwan.
EECS International Graduate Program, National Yang Ming Chiao Tung University, Hsinchu 30010, Taiwan.
Nanotechnology. 2021 Nov 12;33(5). doi: 10.1088/1361-6528/ac2e26.
This work illustrates the most effective way of utilizing the ferroelectricity for tunneling field-effect transistors (TFETs). The ferroelectric (HfZrO) in shunt with gate-dielectric is utilized as an optimized metal-ferroelectric-semiconductor (OMFS) option to improve the internal voltage () for ample utilization of polarization and electric fields of HfZrOacross the tunneling region. The modeling ofsignifies 0.15-1.2 nm reduction in tunneling length () than the nominal metal-ferroelectric-insulator-semiconductor (MFIS) option. Furthermore, the TFET geometry with the scaled-epitaxy region as vertical TFET (VTFET), strained SiGeas source, and gate-all-around nanowire options are used as an added advantage for further enhancement of TFET's performance. As a result, the proposed design (OMFS-VTFET) achieves superior DC and RF performances than the MFIS option of TFET. The figure of merits in terms of DC characteristics in the proposed and optimized structure are of improved on-current (=0.23 mAm), high on-to-off current ratio (=10), steep subthreshold swing (=33.36 mV dec), and superior unity gain cut-off frequency (≥300 GHz). The design is revealed as energy-efficient with significant reduction of energy-efficiency in both logic and memory applications.
这项工作展示了将铁电特性用于隧穿场效应晶体管（TFET）的最有效方法。与栅极电介质并联的铁电体（HfZrO）被用作一种优化的金属 - 铁电体 - 半导体（OMFS）方案，以提高内部电压（ ），从而充分利用HfZrO在隧穿区域的极化和电场。 的建模表明，与标称的金属 - 铁电体 - 绝缘体 - 半导体（MFIS）方案相比，隧穿长度（ ）减少了0.15 - 1.2 nm。此外，具有缩放外延区域的TFET几何结构，如垂直TFET（VTFET）、应变SiGe作为源极以及全栅纳米线方案，被用作进一步提升TFET性能的额外优势。结果，所提出的设计（OMFS - VTFET）比TFET的MFIS方案具有更优异的直流和射频性能。在所提出的优化结构中，就直流特性而言，品质因数包括改善的导通电流（ = 0.23 mA ）、高的开/关电流比（ = 10）、陡峭的亚阈值摆幅（ = 33.36 mV/dec）以及优异的单位增益截止频率（ ≥ 300 GHz）。该设计被证明具有高能效，在逻辑和存储器应用中显著降低了能量消耗。
