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通过调节电容匹配优化基于 HfZrO 的 MoS 负电容场效应晶体管的亚阈值摆幅和迟滞

Optimization of Subthreshold Swing and Hysteresis in HfZrO-Based MoS Negative Capacitance Field-Effect Transistors by Modulating Capacitance Matching.

机构信息

Tianjin Key Laboratory of Film Electronic and Communication Devices, School of Integrated Circuit Science and Engineering, Tianjin University of Technology, Tianjin 300384, China.

School of Microelectronics, Fudan University, Shanghai 200433, China.

出版信息

ACS Appl Mater Interfaces. 2023 Jul 5;15(26):31617-31626. doi: 10.1021/acsami.3c04595. Epub 2023 Jun 20.

DOI:10.1021/acsami.3c04595
PMID:37339447
Abstract

Negative capacitance field effect transistors made of HfZrO (HZO) are one of the most promising candidates for low-power-density devices because of the extremely steep subthreshold swing and high open-state currents resulting from the addition of ferroelectric materials in the gate dielectric layer. In this paper, HZO thin films were prepared by magnetron sputtering combined with rapid thermal annealing. Their ferroelectric properties were adjusted by changing the annealing temperature and the thickness of HZO. Two-dimensional MoS back-gate negative capacitance field-effect transistors (NCFETs) based on HZO were prepared as well. Different annealing temperatures, thicknesses of HZO thin films, and AlO thicknesses were studied to achieve optimal capacitance matching, aiming to reduce both the subthreshold swing of the transistor and the hysteresis of the NCFET. The NCFET exhibits a minimum subthreshold swing as low as 27.9 mV/decade, negligible hysteresis (∼20 mV), and the / of up to 1.58 × 10. Moreover, a negative drain-induced barrier lowering effect and a negative differential resistance effect have been observed. This steep-slope transistor is compatible with standard CMOS manufacturing processes and attractive for 2D logic and sensor applications as well as future energy-efficient nanoelectronic devices with scaled power supplies.

摘要

基于 HfZrO(HZO)的负电容场效应晶体管因其在栅介质层中添加铁电材料而导致极其陡峭的亚阈值摆幅和高导通电流,成为低功耗密度器件的最有前途的候选者之一。本文采用磁控溅射结合快速热退火工艺制备 HZO 薄膜,通过改变退火温度和 HZO 薄膜的厚度来调整其铁电性能。还制备了基于 HZO 的二维 MoS 背栅负电容场效应晶体管(NCFET)。研究了不同的退火温度、HZO 薄膜的厚度和 AlO 厚度,以实现最佳的电容匹配,从而降低晶体管的亚阈值摆幅和 NCFET 的滞后。NCFET 表现出低至 27.9 mV/decade 的最小亚阈值摆幅、可忽略的滞后(约 20 mV)和高达 1.58×10 的。此外,还观察到了负漏极诱导势垒降低效应和负微分电阻效应。这种陡峭斜率的晶体管与标准 CMOS 制造工艺兼容,适用于二维逻辑和传感器应用以及未来具有缩放电源的节能纳米电子器件。

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