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在300毫米硅衬底上对纳米脊工程化铟镓磷/砷化镓异质结双极晶体管进行单片集成。

Monolithic Integration of Nano-Ridge Engineered InGaP/GaAs HBTs on 300 mm Si Substrate.

作者信息

Mols Yves, Vais Abhitosh, Yadav Sachin, Witters Liesbeth, Vondkar Komal, Alcotte Reynald, Baryshnikova Marina, Boccardi Guillaume, Waldron Niamh, Parvais Bertrand, Collaert Nadine, Langer Robert, Kunert Bernardette

机构信息

Advanced RF Group, IMEC, 3001 Leuven, Belgium.

Department of Electronics and Informatics-ETRO, Vrije Universiteit Brussels, 1050 Brussels, Belgium.

出版信息

Materials (Basel). 2021 Sep 29;14(19):5682. doi: 10.3390/ma14195682.

DOI:10.3390/ma14195682
PMID:34640072
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC8510094/
Abstract

Nano-ridge engineering (NRE) is a novel method to monolithically integrate III-V devices on a 300 mm Si platform. In this work, NRE is applied to InGaP/GaAs heterojunction bipolar transistors (HBTs), enabling hybrid III-V/CMOS technology for RF applications. The NRE HBT stacks were grown by metal-organic vapor-phase epitaxy on 300 mm Si (001) wafers with a double trench-patterned oxide template, in an industrial deposition chamber. Aspect ratio trapping in the narrow bottom part of a trench results in a threading dislocation density below 10∙cm in the device layers in the wide upper part of that trench. NRE is used to create larger area NRs with a flat (001) surface, suitable for HBT device fabrication. Transmission electron microscopy inspection of the HBT stacks revealed restricted twin formation after the InGaP emitter layer contacts the oxide sidewall. Several structures, with varying InGaP growth conditions, were made, to further study this phenomenon. HBT devices-consisting of several nano-ridges in parallel-were processed for DC and RF characterization. A maximum DC gain of 112 was obtained and a cut-off frequency f of ~17 GHz was achieved. These results show the potential of NRE III-V devices for hybrid III-V/CMOS technology for emerging RF applications.

摘要

纳米脊工程（NRE）是一种在300毫米硅平台上单片集成III-V族器件的新方法。在这项工作中，NRE被应用于InGaP/GaAs异质结双极晶体管（HBT），实现了用于射频应用的混合III-V族/CMOS技术。NRE HBT叠层在工业沉积腔中，通过金属有机气相外延在具有双沟槽图案化氧化物模板的300毫米硅（001）晶圆上生长。沟槽窄底部的纵横比捕获导致该沟槽宽上部器件层中的位错密度低于10∙cm。NRE用于创建具有平坦（001）表面的更大面积的纳米脊，适用于HBT器件制造。对HBT叠层的透射电子显微镜检查显示，InGaP发射极层与氧化物侧壁接触后，孪晶形成受到限制。制作了几种具有不同InGaP生长条件的结构，以进一步研究这一现象。对由多个平行纳米脊组成的HBT器件进行了直流和射频特性表征。获得了112的最大直流增益，截止频率f约为17 GHz。这些结果表明了NRE III-V族器件在新兴射频应用的混合III-V族/CMOS技术中的潜力。

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本文引用的文献

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