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一种基于现场可编程门阵列的用于高强度重离子加速器直线加速器(iLinac)的新型数字束流位置和相位测量实现方案。

A new digital beam position and phase measurement implementation based on a field programmable gate array for the high intensity heavy-ion accelerator iLinac.

作者信息

Ni Fafu, Li Zhixue, Wu Junxia, Wei Yuan, Hu Xuejing, Gu KeWei, Tian Ruixia, Zhang Yong, Zhu Guangyu, Su Jianjun, Wang Yanyu

机构信息

Institute of Modern Physics, Chinese Academy of Sciences, Lanzhou 730000, China.

出版信息

Rev Sci Instrum. 2022 Jun 1;93(6):063301. doi: 10.1063/5.0089407.

Abstract

A new digital beam position and phase measurement (BPM) system was designed for the ion-Linac accelerator at the high intensity heavy ion accelerator facility. The fundamental and second harmonic signals are retrieved from the BPM electrodes to simultaneously calculate their respective beam positions and phases. All data acquisition and digital signal processing algorithm routines are performed in a field programmable gate array (FPGA). The position and phase information are obtained by using the in-phase and quadrature demodulation method. A practical and straightforward method is used to generate the second harmonic reference signal for processing the second harmonic beam signal. The reconfigurable filters are integrated into the FPGA to allow the measurement of short beam pulse length. The laboratory test results show that the achieved phase resolution is better than 0.2° and 0.03° when the input signal is -60 and -45 dBm, respectively. A position resolution better than 30 μm was achieved for an input power level of approximately -60 dBm, and it can reach 7 μm with the input power higher than -45 dBm. The entire execution time of the algorithm is accomplished within 3.4 µs, which provides a sufficient reaction time for the fast beam interlock signal to the machine protection system. The performance of this newly designed prototype BPM electronics was evaluated with the online proton beam.

摘要

为高强度重离子加速器设施中的离子直线加速器设计了一种新型数字束流位置和相位测量(BPM)系统。从BPM电极获取基波和二次谐波信号,以同时计算它们各自的束流位置和相位。所有数据采集和数字信号处理算法程序均在现场可编程门阵列(FPGA)中执行。通过使用同相和正交解调方法获得位置和相位信息。采用一种实用且直接的方法来生成二次谐波参考信号,用于处理二次谐波束流信号。可重构滤波器集成到FPGA中,以允许测量短束流脉冲长度。实验室测试结果表明,当输入信号分别为-60和-45 dBm时,实现的相位分辨率优于0.2°和0.03°。对于大约-60 dBm的输入功率水平,实现了优于30μm的位置分辨率,当输入功率高于-45 dBm时,可达到7μm。算法的整个执行时间在3.4µs内完成,这为快速束流联锁信号提供了足够的反应时间给机器保护系统。使用在线质子束对这种新设计的原型BPM电子设备的性能进行了评估。

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