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无结肖特基势垒 MoS 场效应晶体管,具有亚 5nm 厚的静电高掺杂通道。

Junctionless Electric-Double-Layer MoS Field-Effect Transistor with a Sub-5 nm Thick Electrostatically Highly Doped Channel.

机构信息

Institute of Advanced Composite Materials, Korea Institute of Science and Technology, Joellabuk-do55324, South Korea.

Department of Electrical Engineering, Gyeongsang National University, Jinju52828, Gyeongnam, South Korea.

出版信息

ACS Appl Mater Interfaces. 2023 Feb 15;15(6):8298-8304. doi: 10.1021/acsami.2c19596. Epub 2023 Feb 5.

DOI:10.1021/acsami.2c19596
PMID:36740775
Abstract

Junctionless transistors are suitable for sub-3 nm applications because of their extremely simple structure and high electrical performance, which compensate for short-channel effects. Two-dimensional semiconductor transition-metal dichalcogenide materials, such as MoS, may also resolve technical and fundamental issues for Si-based technology. Here, we present the first junctionless electric-double-layer field-effect transistor with an electrostatically highly doped 5 nm thick MoS channel. A double-gated MoS transistor with an ionic-liquid top gate and a conventional bottom gate demonstrated good transfer characteristics with a 10 on-off current ratio, a 70 mV dec subthreshold swing at a 0 V bottom-gate bias, and drain-current versus top-gate-voltage characteristics were shifted left significantly with increasing bottom-gate bias due to an electrostatically increased overall charge carrier concentration in the MoS channel. When a bottom-gate bias of 80 V was applied, a shoulder and two clear peak features were identified in the transconductance and its derivative, respectively; this outcome is typical of Si-based junctionless transistors. Furthermore, the decrease in electron mobility induced by a transverse electric field was reduced with increasing bottom-gate bias. Numerical simulations and analytical models were used to support these findings, which clarify the operation of junctionless MoS transistors with an electrostatically highly doped channel.

摘要

无结晶体管由于其极其简单的结构和优异的电学性能,适用于亚 3nm 应用,可弥补短沟道效应。二维半导体过渡金属二卤化物材料,如 MoS 2,也可能解决基于 Si 的技术的技术和基本问题。在这里,我们提出了第一个具有静电高掺杂 5nm 厚 MoS 沟道的无结电双层场效应晶体管。具有离子液体顶栅和常规底栅的双栅 MoS 晶体管具有良好的转移特性,其 10 的导通-关断电流比,在 0V 底栅偏置下 70mV/dec 的亚阈值摆幅,并且由于 MoS 沟道中静电增加的总载流子浓度,漏极电流与顶栅电压特性明显左移。当施加 80V 的底栅偏置时,在跨导及其导数中分别识别出一个肩部和两个清晰的峰特征;这一结果是基于 Si 的无结晶体管的典型特征。此外,随着底栅偏置的增加,横向电场引起的电子迁移率降低。数值模拟和分析模型用于支持这些发现,这些发现阐明了具有静电高掺杂沟道的无结 MoS 晶体管的工作原理。

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