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作为晶体管沟道的一维范德华异质结构的水平阵列

Horizontal Arrays of One-Dimensional van der Waals Heterostructures as Transistor Channels.

作者信息

Matsushita Satoru, Otsuka Keigo, Sugihara Taiki, Zhu Guangyao, Kittipaisalsilpa Kasidis, Lee Minhyeok, Xiang Rong, Chiashi Shohei, Maruyama Shigeo

机构信息

Department of Mechanical Engineering, The University of Tokyo, Tokyo 113-8656, Japan.

State Key Laboratory of Fluid Power and Mechatronic Systems, School of Mechanical Engineering, Zhejiang University, Hangzhou 310027, China.

出版信息

ACS Appl Mater Interfaces. 2023 Mar 1;15(8):10965-10973. doi: 10.1021/acsami.2c22964. Epub 2023 Feb 17.

Abstract

The nanotube/dielectric interface plays an essential role in achieving superb switching characteristics of carbon nanotube-based transistors for energy-efficient computation. Formation of van der Waals heterostructures with hexagonal boron nitride nanotubes could be an effective means to reduce interface state density, but the need for isolating nanotubes during the formation of coaxial outer layers has hindered the fabrication of their horizontal arrays. Here, we develop a strategy to create isolated heterostructure arrays using aligned carbon nanotubes grown on a quartz substrate as starting materials. Air-suspended arrays of carbon nanotubes are prepared by a dry transfer technique and then used as templates for the coaxial wrapping of boron nitride nanotubes. We then fabricate the transistors, where boron nitride serves as interfacial layers between carbon nanotube channels and conventional gate dielectrics, showing hysteresis-free characteristics owing to the improved interfaces. We have also gained a deeper understanding of the strain applied on inner carbon nanotubes, as well as the inhomogeneity of the outer coating, by characterizing individual heterostructures over trenches and on a substrate surface. The device fabrication and characterization presented here essentially do not require elaborate electron microscopy, thus paving the way for the practical use of one-dimensional van der Waals heterostructures for nanoelectronics.

摘要

纳米管/电介质界面对于实现基于碳纳米管的晶体管卓越的开关特性以进行节能计算起着至关重要的作用。与六方氮化硼纳米管形成范德华异质结构可能是降低界面态密度的有效手段,但在同轴外层形成过程中对纳米管进行隔离的需求阻碍了其水平阵列的制造。在此,我们开发了一种策略,以在石英衬底上生长的排列碳纳米管作为起始材料来创建隔离的异质结构阵列。通过干转移技术制备碳纳米管的空气悬浮阵列,然后将其用作氮化硼纳米管同轴包裹的模板。接着,我们制造晶体管,其中氮化硼充当碳纳米管通道与传统栅极电介质之间的界面层,由于界面得到改善而呈现无滞后特性。通过对沟槽上方和衬底表面的单个异质结构进行表征,我们还对施加在内层碳纳米管上的应变以及外层涂层的不均匀性有了更深入的了解。这里展示的器件制造和表征基本上不需要精密的电子显微镜,从而为一维范德华异质结构在纳米电子学中的实际应用铺平了道路。

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