Chen Zhuo, Zhu Huilong, Wang Guilei, Wang Qi, Xiao Zhongrui, Zhang Yongkui, Liu Jinbiao, Lu Shunshun, Du Yong, Yu Jiahan, Xiong Wenjuan, Kong Zhenzhen, Du Anyan, Yan Zijin, Zheng Yantong
Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China.
Microelectronics Institute, University of Chinese Academy of Sciences, Beijing 100049, China.
Nanomaterials (Basel). 2023 Jun 1;13(11):1786. doi: 10.3390/nano13111786.
Transistor scaling has become increasingly difficult in the dynamic random access memory (DRAM). However, vertical devices will be good candidates for 4F DRAM cell transistors (F = pitch/2). Most vertical devices are facing some technical challenges. For example, the gate length cannot be precisely controlled, and the gate and the source/drain of the device cannot be aligned. Recrystallization-based vertical C-shaped-channel nanosheet field-effect transistors (RC-VCNFETs) were fabricated. The critical process modules of the RC-VCNFETs were developed as well. The RC-VCNFET with a self-aligned gate structure has excellent device performance, and its subthreshold swing (SS) is 62.91 mV/dec. Drain-induced barrier lowering (DIBL) is 6.16 mV/V.
在动态随机存取存储器(DRAM)中,晶体管缩放变得越来越困难。然而,垂直器件将是4F DRAM单元晶体管(F = 节距/2)的良好候选者。大多数垂直器件都面临一些技术挑战。例如,栅极长度无法精确控制,并且器件的栅极与源极/漏极无法对齐。基于再结晶的垂直C形沟道纳米片场效应晶体管(RC-VCNFET)被制造出来。RC-VCNFET的关键工艺模块也得到了开发。具有自对准栅极结构的RC-VCNFET具有优异的器件性能,其亚阈值摆幅(SS)为62.91 mV/dec。漏极诱导势垒降低(DIBL)为6.16 mV/V。