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具有亚10纳米垂直沟道的少层MoS场效应晶体管。

Few-Layered MoS Field-Effect Transistors with a Vertical Channel of Sub-10 nm.

作者信息

Zou Xiao, Liu Lu, Xu Jingping, Wang Hongjiu, Tang Wing-Man

机构信息

Department of Electromachine Engineering, Jianghan University, Wuhan 430056, People's Republic of China.

School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, People's Republic of China.

出版信息

ACS Appl Mater Interfaces. 2020 Jul 22;12(29):32943-32950. doi: 10.1021/acsami.0c09060. Epub 2020 Jul 13.

DOI:10.1021/acsami.0c09060
PMID:32610894
Abstract

Few-layered molybdenum disulfide (MoS) has demonstrated promising advantages for the integration of next-generation electronic devices. A vertical short-channel MoS transistor with a channel length of sub-10 nm can be realized using mica as the insulated mesa and MoS flake dry-transferred onto the mica as the channel. A near-perfect symmetrical and fully saturated output characteristic can be obtained for the positive or negative drain-source voltage. This result is attributed to an effective transformation of the drain-source electrode contact from Schottky contact to Ohmic contact via forming gas annealing. The vertical-channel MoS transistor with a channel length of 8.7 nm exhibits excellent electrical characteristics, for example, a negligible hysteresis voltage of 60 mV, an extraordinarily small subthreshold swing of 73 mV/dec, a considerably weakened drain-induced barrier-lowering effect (100 mV/V), and the first-reported intrinsic delay time of 2.85 ps. Moreover, a logic inverter can be realized using the two vertical-channel MoS transistors, with a high voltage gain of 33. Experimental results indicate that the developed method is a potential approach for fabricating MoS transistors with an ultrashort channel and high performance, and consequently, manufacturing MoS-based integrated circuits.

摘要

少层二硫化钼(MoS)已在下一代电子器件集成方面展现出了诱人的优势。以云母作为绝缘台面,并将干转移到云母上的MoS薄片作为沟道,可实现沟道长度小于10nm的垂直短沟道MoS晶体管。对于正向或负向漏源电压,均可获得近乎完美的对称且完全饱和的输出特性。该结果归因于通过形成气体退火,漏源电极接触从肖特基接触有效转变为欧姆接触。沟道长度为8.7nm的垂直沟道MoS晶体管表现出优异的电学特性,例如,滞后电压可忽略不计,仅为60mV,亚阈值摆幅极小,仅为73mV/dec,漏极诱导势垒降低效应显著减弱(100mV/V),且首次报道了其本征延迟时间为2.85ps。此外,使用两个垂直沟道MoS晶体管可实现逻辑反相器,其电压增益高达33。实验结果表明,所开发的方法是制造具有超短沟道和高性能的MoS晶体管,进而制造基于MoS的集成电路的一种潜在方法。

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