Two-Terminal MoS Memristor and the Homogeneous Integration with a MoS Transistor for Neural Networks.

Memristors are promising candidates for constructing neural networks. However, their dissimilar working mechanism to that of the addressing transistors can result in a scaling mismatch, which may hinder efficient integration. Here, we demonstrate two-terminal MoS memristors that work with a charge-based mechanism similar to that in transistors, which enables the homogeneous integration with MoS transistors to realize one-transistor-one-memristor addressable cells for assembling programmable networks. The homogenously integrated cells are implemented in a 2 × 2 network array to demonstrate the enabled addressability and programmability. The potential for assembling a scalable network is evaluated in a simulated neural network using obtained realistic device parameters, which achieves over 91% pattern recognition accuracy. This study also reveals a generic mechanism and strategy that can be applied to other semiconducting devices for the engineering and homogeneous integration of memristive systems.