Kim Jeong-Geun, Baek Donghyun
Department of Electronic Engineering, Kwangwoon University, Seoul 01897, Republic of Korea.
School of Electrical Engineering, Chung-Ang University, Seoul 06974, Republic of Korea.
Sensors (Basel). 2023 Jul 31;23(15):6827. doi: 10.3390/s23156827.
This paper presents a wideband 4-bit true time delay IC using a 0.25 μm GaN HEMT (High-Electron-Mobility Transistor) process for the beam-squint-free phased array antennas. The true time delay IC is implemented with a switched path circuit topology using DPDT (Double Pole Double Throw) with no shunt transistor in the inter-stages to improve the bandwidth and SPDT (Single Pole Single Throw) switches at the input and the output ports. The delay lines are implemented with CLC π-networks with the lumped element to ensure a compact chip size. A negative voltage generator and an SPI controller are implemented in the PCB (Printed Circuit Board) due to the lack of digital control logic in GaN technology. A maximum time delay of ~182 ps with a time delay resolution of 10.5 ps is achieved at DC-6 GHz. The RMS (Root Mean Square) time delay and amplitude error are <5 ps and <0.6 dB, respectively. The measured insertion loss is <6.8 dB and the input and output return losses are >10 dB at DC-6 GHz. The current consumption is nearly zero with a 3.3 V supply. The chip size including pads is 2.45 × 1.75 mm. To the authors' knowledge, this is the first demonstration of a true time delay IC using GaN HEMT technology.
本文介绍了一种采用0.25μm氮化镓高电子迁移率晶体管（HEMT）工艺的宽带4位真时延集成电路，用于无波束斜视相控阵天线。该真时延集成电路采用开关路径电路拓扑结构实现，使用双刀双掷（DPDT）开关，级间无并联晶体管，以提高带宽，并在输入和输出端口使用单刀单掷（SPDT）开关。延迟线采用带有集总元件的CLCπ网络实现，以确保芯片尺寸紧凑。由于氮化镓技术缺乏数字控制逻辑，因此在印刷电路板（PCB）中实现了负电压发生器和SPI控制器。在直流至6GHz频率范围内，实现了最大时延约182ps，时延分辨率为10.5ps。均方根（RMS）时延和幅度误差分别小于5ps和0.6dB。在直流至6GHz频率范围内，测得的插入损耗小于6.8dB，输入和输出回波损耗大于10dB。在3.3V电源供电下，电流消耗几乎为零。包括焊盘在内的芯片尺寸为2.45×1.75mm。据作者所知，这是首次展示采用氮化镓HEMT技术的真时延集成电路。
