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一种采用组合输入对用于神经信号记录的高共模抑制比差分放大器。

A High CMRR Differential Difference Amplifier Employing Combined Input Pairs for Neural Signal Recordings.

作者信息

Zhu Longbin, Zhou Zhijun, Wang Wenjie, Xie Siyuan, Meng Qiao, Wang Zhigong

出版信息

IEEE Trans Biomed Circuits Syst. 2024 Feb;18(1):100-110. doi: 10.1109/TBCAS.2023.3311465. Epub 2024 Jan 26.

Abstract

This article introduces a Combined .symmetrical and complementary Input Pairs (CIP) of a Differential Difference Amplifier (DDA), to boost the total Common-Mode Rejection Ratio (CMRR) for multi-channel neural signal recording. The proposed CIP-DDA employs three input pairs (transconductors). The dc-coupled input neural signal connection, via the gate terminal of the first transconductor, yields a high input impedance. The high-pass corner frequency and dc quiescent operation point are stabilized by the second transconductor. The calibration path of differential-mode gain and Common-Mode Feedback (CMFB) is provided by the proposed third transconductor. The parallel connection has no need for extra voltage headroom of input and output. The proposed CIP-DDA is targeted at integrated circuit realization and designed in a 0.18-μm CMOS technology. The proposed CIP-DDAs with system CMFB achieve an average CMRR of 103 dB, and each channel consumes circa 3.6 μW power consumption.

摘要

本文介绍了一种差分差分放大器(DDA)的组合对称和互补输入对(CIP),以提高多通道神经信号记录的总共模抑制比(CMRR)。所提出的CIP-DDA采用三个输入对(跨导器)。通过第一个跨导器的栅极端子进行的直流耦合输入神经信号连接,可产生高输入阻抗。第二个跨导器可稳定高通转折频率和直流静态工作点。所提出的第三个跨导器提供差模增益和共模反馈(CMFB)的校准路径。并联连接无需输入和输出的额外电压余量。所提出的CIP-DDA旨在实现集成电路,并采用0.18μm CMOS技术进行设计。所提出的具有系统CMFB的CIP-DDA实现了103 dB的平均CMRR,每个通道的功耗约为3.6μW。

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