Ram Ankita, Maity Krishna, Marchand Cédric, Mahmoudi Aymen, Kshirsagar Aseem Rajan, Soliman Mohamed, Taniguchi Takashi, Watanabe Kenji, Doudin Bernard, Ouerghi Abdelkarim, Reichardt Sven, O'Connor Ian, Dayen Jean-Francois
Université de Strasbourg, IPCMS-CNRS UMR 7504, 23 Rue du Loess, 67034 Strasbourg, France.
École Centrale de Lyon, 36 Avenue Guy de Collongue, Ecully 69134, France.
ACS Nano. 2023 Nov 14;17(21):21865-21877. doi: 10.1021/acsnano.3c07952. Epub 2023 Oct 21.
Emerging reconfigurable devices are fast gaining popularity in the search for next-generation computing hardware, while ferroelectric engineering of the doping state in semiconductor materials has the potential to offer alternatives to traditional von-Neumann architecture. In this work, we combine these concepts and demonstrate the suitability of reconfigurable ferroelectric field-effect transistors (Re-FeFETs) for designing nonvolatile reconfigurable logic-in-memory circuits with multifunctional capabilities. Modulation of the energy landscape within a homojunction of a 2D tungsten diselenide (WSe) layer is achieved by independently controlling two split-gate electrodes made of a ferroelectric 2D copper indium thiophosphate (CuInPS) layer. Controlling the state encoded in the program gate enables switching between p, n, and ambipolar FeFET operating modes. The transistors exhibit on-off ratios exceeding 10 and hysteresis windows of up to 10 V width. The homojunction can change from Ohmic-like to diode behavior with a large rectification ratio of 10. When programmed in the diode mode, the large built-in p-n junction electric field enables efficient separation of photogenerated carriers, making the device attractive for energy-harvesting applications. The implementation of the Re-FeFET for reconfigurable logic functions shows how a circuit can be reconfigured to emulate either polymorphic ferroelectric NAND/AND logic-in-memory or electronic XNOR logic with a long retention time exceeding 10 s. We also illustrate how a circuit design made of just two Re-FeFETs exhibits high logic expressivity with reconfigurability at runtime to implement several key nonvolatile 2-input logic functions. Moreover, the Re-FeFET circuit demonstrates high compactness, with an up to 80% reduction in transistor count compared to standard CMOS design. The 2D van de Waals Re-FeFET devices therefore exhibit promising potential for both More-than-Moore and beyond-Moore future of electronics, in particular for an energy-efficient implementation of in-memory computing and machine learning hardware, due to their multifunctionality and design compactness.
新兴的可重构器件在寻找下一代计算硬件方面正迅速受到欢迎,而半导体材料中掺杂态的铁电工程有潜力为传统冯·诺依曼架构提供替代方案。在这项工作中,我们结合了这些概念,并证明了可重构铁电场效应晶体管(Re-FeFET)适用于设计具有多功能能力的非易失性可重构逻辑内存电路。通过独立控制由铁电二维硫代磷酸铜铟(CuInPS)层制成的两个分裂栅电极,实现了对二维二硒化钨(WSe)层同质结内能量景观的调制。控制编程栅中编码的状态可实现p型、n型和双极性FeFET工作模式之间的切换。这些晶体管的开/关比超过10,滞后窗口宽度高达10 V。该同质结可以从类似欧姆的行为转变为具有10的大整流比的二极管行为。当以二极管模式编程时,大的内置p-n结电场能够有效地分离光生载流子,使该器件对能量收集应用具有吸引力。用于可重构逻辑功能的Re-FeFET的实现展示了如何对电路进行重构,以模拟多晶型铁电与非/与逻辑内存或具有超过10秒的长保持时间的电子异或非逻辑。我们还说明了仅由两个Re-FeFET组成的电路设计如何在运行时具有可重构性,从而表现出高逻辑表现力,以实现几个关键的非易失性2输入逻辑功能。此外,Re-FeFET电路展示了高紧凑性,与标准CMOS设计相比,晶体管数量减少了多达80%。因此,二维范德华Re-FeFET器件在电子学的超越摩尔和后摩尔未来都展现出了有前景的潜力,特别是对于内存计算和机器学习硬件的节能实现,这得益于它们的多功能性和设计紧凑性。