Suppr超能文献

用于二维夹心异质结构电子学的具有清洁范德华界面的超薄氧化铪集成

Integration of Ultrathin Hafnium Oxide with a Clean van der Waals Interface for Two-Dimensional Sandwich Heterostructure Electronics.

作者信息

Jing Yumei, Dai Xianfu, Yang Junqiang, Zhang Xiaobin, Wang Zhongwang, Liu Xiaochi, Li Huamin, Yuan Yahua, Zhou Xuefan, Luo Hang, Zhang Dou, Sun Jian

机构信息

School of Physics, Central South University, No. 932 South Lushan Road, Changsha 410083, China.

Beijing Advanced Innovation Center for Materials Genome Engineering, State Key Laboratory for Advanced Metals and Materials, University of Science and Technology Beijing, Beijing 100083, China.

出版信息

Nano Lett. 2024 Apr 3;24(13):3937-3944. doi: 10.1021/acs.nanolett.4c00117. Epub 2024 Mar 25.

Abstract

Integrating high-κ dielectrics with a small equivalent oxide thickness (EOT) with two-dimensional (2D) semiconductors for low-power consumption van der Waals (vdW) heterostructure electronics remains challenging in meeting both interface quality and dielectric property requirements. Here, we demonstrate the integration of ultrathin amorphous HfO sandwiched within vdW heterostructures by the selective thermal oxidation of HfSe precursors. The self-cleaning process ensures a high-quality interface with a low interface state density of 10-10 cm eV. The synthesized HfO displays excellent dielectric properties with an EOT of ∼1.5 nm, i.e., a high κ of ∼16, an ultralow leakage current of 10 A/cm, and an impressively high breakdown field of 9.5 MV/cm. This facilitates low-power consumption vdW heterostructure MoS transistors, demonstrating steep switching with a low subthreshold swing of 61 mV/decade. This one-step integration of high-κ dielectrics into vdW sandwich heterostructures holds immense potential for developing low-power consumption 2D electronics while meeting comprehensive dielectric requirements.

摘要

将具有小等效氧化层厚度(EOT)的高κ电介质与二维(2D)半导体集成用于低功耗范德华(vdW)异质结构电子器件,在满足界面质量和介电性能要求方面仍然具有挑战性。在此,我们通过对HfSe前驱体进行选择性热氧化,展示了夹在vdW异质结构中的超薄非晶HfO的集成。自清洁过程确保了高质量的界面,界面态密度低至10-10 cm eV。合成的HfO表现出优异的介电性能,EOT约为1.5 nm,即κ高达约16,超低漏电流为10 A/cm,以及令人印象深刻的9.5 MV/cm的高击穿场强。这有利于低功耗vdW异质结构MoS晶体管,展示出陡峭的开关特性,亚阈值摆幅低至61 mV/十倍频程。这种将高κ电介质一步集成到vdW夹心异质结构中的方法,在满足综合介电要求的同时,为开发低功耗二维电子器件具有巨大潜力。

文献检索

告别复杂PubMed语法,用中文像聊天一样搜索,搜遍4000万医学文献。AI智能推荐,让科研检索更轻松。

立即免费搜索

文件翻译

保留排版,准确专业,支持PDF/Word/PPT等文件格式,支持 12+语言互译。

免费翻译文档

深度研究

AI帮你快速写综述,25分钟生成高质量综述,智能提取关键信息,辅助科研写作。

立即免费体验