Two-Dimensional Tunneling Memtransistor with Thin-Film Heterostructure for Low-Power Logic-in-Memory Complementary Metal-Oxide Semiconductor.

With the demand for high-performance and miniaturized semiconductor devices continuously rising, the development of innovative tunneling transistors via efficient stacking methods using two-dimensional (2D) building blocks has paramount importance in the electronic industry. Hence, 2D semiconductors with atomically thin geometries hold significant promise for advancements in electronics. In this study, we introduced tunneling memtransistors with a thin-film heterostructure composed of 2D semiconducting MoS and WSe. Devices with the dual function of tuning and memory operation were realized by the gate-regulated modulation of the barrier height at the heterojunction and manipulation of intrinsic defects within the exfoliated nanoflakes using solution processes. Further, our investigation revealed extensive edge defects and four distinct defect types, namely monoselenium vacancies, diselenium vacancies, tungsten vacancies, and tungsten adatoms, in the interior of electrochemically exfoliated WSe nanoflakes. Additionally, we constructed complementary metal-oxide semiconductor-based logic-in-memory devices with a small static power in the range of picowatts using the developed tunneling memtransistors, demonstrating a promising approach for next-generation low-power nanoelectronics.