Sun Jigeng, Zhou Shaolin, Ye Ziyang, Hu Bo, Zou Yi
Opt Express. 2024 Apr 22;32(9):14994-15007. doi: 10.1364/OE.519018.
Matrix multiplication acceleration by on-chip (PICs) is emerging as one of the attractive and promising solutions, offering outstanding benefits in speed and bandwidth as compared to non-photonic approaches. Incorporating nonvolatile phase-change materials into PICs or devices enables optical storage and computing, surpassing their electrical counterparts. In this paper, we propose a design of on-chip photonic convolution for optical in-memory computing by integrating the phase change chalcogenide of (GSST) into an asymmetric directional coupler for constructions of an in-memory computing cell, marrying the advantages of both the large bandwidth of (MZIs) and the small size of (MRRs). Through quasi-continuous electro-thermal tuning of the GSST-integrated in-memory computing cells, numerical calculations about the optical and electro-thermal behaviors during GSST phase transition confirm the tunability of the programmable elements stored in the in-memory computing cells within [-1, 1]. For proof-of-concept verification, we apply the proposed optical convolutional kernel to a typical image edge detection application. As evidenced by the evaluation results, the prototype achieves the same accuracy as the convolution kernel implemented on a common digital computer, demonstrating the feasibility of the proposed scheme for on-chip photonic convolution and optical in-memory computing.
通过片上光子集成电路（PICs）实现的矩阵乘法加速正成为一种有吸引力且前景广阔的解决方案，与非光子方法相比，在速度和带宽方面具有显著优势。将非易失性相变材料集成到PICs或器件中可实现光存储和计算，超越其电子同类产品。在本文中，我们通过将锗锑碲（GSST）相变硫族化物集成到非对称定向耦合器中以构建内存计算单元，提出了一种用于光内存计算的片上光子卷积设计，融合了马赫曾德干涉仪（MZIs）的大带宽和微环谐振器（MRRs）的小尺寸这两者的优点。通过对集成了GSST的内存计算单元进行准连续电热调谐，关于GSST相变期间光学和电热行为的数值计算证实了存储在内存计算单元中的可编程元件在[-1, 1]范围内的可调性。为进行概念验证，我们将所提出的光学卷积核应用于典型的图像边缘检测应用。评估结果表明，该原型实现了与在普通数字计算机上实现的卷积核相同的精度，证明了所提出的片上光子卷积和光内存计算方案的可行性。
