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大脑回路结构中学习序列记忆的神经基础。

A neural basis for learning sequential memory in brain loop structures.

作者信息

Sihn Duho, Kim Sung-Phil

机构信息

Department of Biomedical Engineering, Ulsan National Institute of Science and Technology, Ulsan, Republic of Korea.

出版信息

Front Comput Neurosci. 2024 Aug 5;18:1421458. doi: 10.3389/fncom.2024.1421458. eCollection 2024.

Abstract

INTRODUCTION

Behaviors often involve a sequence of events, and learning and reproducing it is essential for sequential memory. Brain loop structures refer to loop-shaped inter-regional connection structures in the brain such as cortico-basal ganglia-thalamic and cortico-cerebellar loops. They are thought to play a crucial role in supporting sequential memory, but it is unclear what properties of the loop structure are important and why.

METHODS

In this study, we investigated conditions necessary for the learning of sequential memory in brain loop structures via computational modeling. We assumed that sequential memory emerges due to delayed information transmission in loop structures and presented a basic neural activity model and validated our theoretical considerations with spiking neural network simulations.

RESULTS

Based on this model, we described the factors for the learning of sequential memory: first, the information transmission delay should decrease as the size of the loop structure increases; and second, the likelihood of the learning of sequential memory increases as the size of the loop structure increases and soon saturates. Combining these factors, we showed that moderate-sized brain loop structures are advantageous for the learning of sequential memory due to the physiological restrictions of information transmission delay.

DISCUSSION

Our results will help us better understand the relationship between sequential memory and brain loop structures.

摘要

引言

行为通常涉及一系列事件,学习和再现这些事件对于序列记忆至关重要。脑环路结构是指大脑中如皮质-基底神经节-丘脑环路和皮质-小脑环路等呈环状的区域间连接结构。它们被认为在支持序列记忆方面起着关键作用,但尚不清楚环路结构的哪些特性是重要的以及原因何在。

方法

在本研究中,我们通过计算建模研究了脑环路结构中序列记忆学习所需的条件。我们假设序列记忆是由于环路结构中的信息延迟传递而产生的,并提出了一个基本神经活动模型,并用脉冲神经网络模拟验证了我们的理论思考。

结果

基于该模型,我们描述了序列记忆学习的因素:首先,信息传递延迟应随着环路结构大小的增加而减小;其次,序列记忆学习的可能性随着环路结构大小的增加而增加,并很快达到饱和。综合这些因素,我们表明,由于信息传递延迟的生理限制,中等大小的脑环路结构有利于序列记忆的学习。

讨论

我们的结果将有助于我们更好地理解序列记忆与脑环路结构之间的关系。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/394d/11330804/a624b336322b/fncom-18-1421458-g0001.jpg

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