Ferreira Diogo, Moutinho Filipe, Matos-Carvalho João P, Guedes Magno, Deusdado Pedro
INTROSYS SA, 2950-805 Quinta do Anjo, Portugal.
NOVA School of Science and Technology, NOVA University Lisbon, 2829-516 Caparica, Portugal.
Sensors (Basel). 2024 Sep 20;24(18):6101. doi: 10.3390/s24186101.
Currently, there is a demand for an increase in the diversity and quality of new products reaching the consumer market. This fact imposes new challenges for different industrial sectors, including processes that integrate machine vision. Hardware acceleration and improvements in processing efficiency are becoming crucial for vision-based algorithms to follow the complexity growth of future industrial systems. This article presents a generic library of pre-processing filters for execution in field-programmable gate arrays (FPGAs) to reduce the overall image processing time in vision systems. An experimental setup based on the Zybo Z7 Pcam 5C Demo project was developed and used to validate the filters described in VHDL (VHSIC hardware description language). Finally, a comparison of the execution times using GPU and CPU platforms was performed as well as an evaluation of the integration of the current work in an industrial application. The results showed a decrease in the pre-processing time from milliseconds to nanoseconds when using FPGAs.
目前，对于进入消费市场的新产品，在多样性和质量方面存在着增长需求。这一事实给包括集成机器视觉的流程在内的不同工业部门带来了新的挑战。硬件加速和处理效率的提升对于基于视觉的算法跟上未来工业系统的复杂性增长变得至关重要。本文提出了一个用于在现场可编程门阵列（FPGA）中执行的预处理滤波器通用库，以减少视觉系统中的整体图像处理时间。基于Zybo Z7 Pcam 5C演示项目开发了一个实验装置，并用于验证用VHDL（超高速集成电路硬件描述语言）描述的滤波器。最后，对使用GPU和CPU平台的执行时间进行了比较，并对当前工作在工业应用中的集成进行了评估。结果表明，使用FPGA时，预处理时间从毫秒减少到了纳秒。
