Kumar Gundugonti Kishore, Chinnapurapu Naga Raghuram, Srinivas Kankanala
Velagapudi Ramakrishna Siddhartha Engineering College Deemed to be University, Vijayawada, India.
School of Electronics Engineering, VIT-AP University, Inavolu, Beside AP Secretariat, Amaravati, AP, 522237, India.
Sci Rep. 2024 Sep 30;14(1):22599. doi: 10.1038/s41598-024-73514-5.
This article introduces a novel FIR filter using a Radix-2r multiplier combined with 4:2 and 3:2 compressors for denoising Electrooculography (EOG) signals. This approach replaces traditional ripple-carry adders with compressors to add the partial products generated by the Radix-2r multiplier, resulting in reduced delay and energy consumption. The FIR filter is implemented in gate-level Verilog HDL, verified using ModelSim and Altera DSP Builder, and synthesized with the Cadence RTL compiler. Compared to conventional designs, the proposed filter achieves a 71.48% reduction in area, 73.28% reduction in power, 51.84% reduction in delay, 86.22% reduction in the area-delay product (ADP), and 92.38% reduction in energy-per-operation (EPS), significantly outperforming the SOPOT filter.
本文介绍了一种新型有限脉冲响应（FIR）滤波器，该滤波器使用基-2r乘法器与4:2和3:2压缩器相结合，用于对眼电图（EOG）信号进行去噪。这种方法用压缩器取代传统的进位加法器来累加基-2r乘法器生成的部分积，从而减少延迟和能耗。该FIR滤波器采用门级Verilog硬件描述语言（HDL）实现，使用ModelSim和Altera DSP Builder进行验证，并使用Cadence RTL编译器进行综合。与传统设计相比，所提出的滤波器在面积上减少了71.48%，功耗降低了73.28%，延迟减少了51.84%，面积-延迟积（ADP）降低了86.22%，每操作能耗（EPS）降低了92.38%，显著优于SOPOT滤波器。
