Tan Pukun, Niu Chang, Lin Zehao, Lin Jian-Yu, Long Linjia, Zhang Yizhi, Wilk Glen, Wang Haiyan, Ye Peide D
Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, Indiana 47907, United States.
Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States.
Nano Lett. 2024 Oct 9;24(40):12433-12441. doi: 10.1021/acs.nanolett.4c02969. Epub 2024 Oct 1.
There is an increasing demand for p-type semiconductors with scalable growth, excellent device performance, and back-end-of-line (BEOL) compatibility. Recently, tellurium (Te) has emerged as a promising candidate due to its appealing electrical properties and potential low-temperature production. So far, nearly all of the scalable production and integration of Te with complementary metal oxide semiconductor (CMOS) technology have been based on physical vapor deposition. Here we demonstrate wafer-scale atomic layer-deposited (ALD) TeO/Te heterostructure thin-film transistors with high uniformity and integration compatibility. The wafer-scale uniformity of the film is evidenced by spatial Raman mappings and statistical electrical analysis. Furthermore, surface accumulation-induced good ohmic contact has been observed and explained by the unique band alignment of the charge neutrality level inside the Te valence band. These results demonstrate ALD TeO/Te as a promising p-type semiconductor for monolithic three-dimensional integration in BEOL CMOS applications incorporated with well-established n-type ALD oxide semiconductors.
对具有可扩展生长、优异器件性能和后端（BEOL）兼容性的p型半导体的需求日益增长。最近，碲（Te）因其吸引人的电学性质和潜在的低温生产特性而成为一个有前景的候选材料。到目前为止，几乎所有碲与互补金属氧化物半导体（CMOS）技术的可扩展生产和集成都是基于物理气相沉积。在此，我们展示了具有高均匀性和集成兼容性的晶圆级原子层沉积（ALD）TeO/Te异质结构薄膜晶体管。薄膜的晶圆级均匀性通过空间拉曼映射和统计电学分析得到证明。此外，通过碲价带内电荷中性水平的独特能带排列，观察并解释了表面积累诱导的良好欧姆接触。这些结果表明，ALD TeO/Te作为一种有前景的p型半导体，可用于与成熟的n型ALD氧化物半导体相结合的BEOL CMOS应用中的单片三维集成。
