Wang Wenhui, Li Ke, Lan Jun, Shen Mei, Wang Zhongrui, Feng Xuewei, Yu Hongyu, Chen Kai, Li Jiamin, Zhou Feichi, Lin Longyang, Zhang Panpan, Li Yida
School of Microelectronics, Southern University of Science and Technology, 518055, Shenzhen, China.
Department of Electrical and Electronic Engineering, The University of Hong Kong, 999077, Hong Kong SAR, China.
Nat Commun. 2023 Sep 28;14(1):6079. doi: 10.1038/s41467-023-41868-5.
The development of high-performance oxide-based transistors is critical to enable very large-scale integration (VLSI) of monolithic 3-D integrated circuit (IC) in complementary metal oxide semiconductor (CMOS) backend-of-line (BEOL). Atomic layer deposition (ALD) deposited ZnO is an attractive candidate due to its excellent electrical properties, low processing temperature below copper interconnect thermal budget, and conformal sidewall deposition for novel 3D architecture. An optimized ALD deposited ZnO thin-film transistor achieving a record field-effect and intrinsic mobility (µ /µ) of 85/140 cm/V·s is presented here. The ZnO TFT was integrated with HfO RRAM in a 1 kbit (32 × 32) 1T1R array, demonstrating functionalities in RRAM switching. In order to co-design for future technology requiring high performance BEOL circuitries implementation, a spice-compatible model of the ZnO TFTs was developed. We then present designs of various ZnO TFT-based inverters, and 5-stage ring oscillators through simulations and experiments with working frequency exceeding 10's of MHz.
高性能氧化物基晶体管的发展对于在互补金属氧化物半导体（CMOS）后端制程（BEOL）中实现单片三维集成电路（IC）的超大规模集成（VLSI）至关重要。原子层沉积（ALD）法沉积的ZnO因其优异的电学性能、低于铜互连热预算的低加工温度以及适用于新型三维架构的保形侧壁沉积，成为极具吸引力的候选材料。本文展示了一种经过优化的ALD沉积ZnO薄膜晶体管，其场效应和本征迁移率（µ /µ）达到了创纪录的85/140 cm²/V·s。该ZnO薄膜晶体管与HfO电阻式随机存取存储器（RRAM）集成在一个1 kbit（32×32）的1T1R阵列中，展示了RRAM开关功能。为了共同设计未来需要高性能BEOL电路实现的技术，开发了一种与SPICE兼容的ZnO薄膜晶体管模型。然后，通过模拟和实验展示了各种基于ZnO薄膜晶体管的反相器以及五级环形振荡器的设计，其工作频率超过了几十兆赫兹。
