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Enhancing Uniformity, Read Voltage Margin, and Retention in Three-Dimensional and Self-Rectifying Vertical Pt/TaO/AlO/TiN Memristors.

作者信息

Park Tae Won, Moon Jiwon, Shin Dong Hoon, Kim Hae Jin, Kim Seung Soo, Cho Jea Min, Park Hyungjun, Woo Kyung Seok, Kim Dong Yun, Cheong Sunwoo, Song Haewon, Shin Jong Hoon, Lee Soo Hyung, Ghenzi Néstor, Hwang Cheol Seong

机构信息

Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea.

Department of Materials Science and Engineering, Myongji University, Yongin 17058, Korea.

出版信息

ACS Appl Mater Interfaces. 2024 Nov 27;16(47):65046-65057. doi: 10.1021/acsami.4c15598. Epub 2024 Nov 12.

DOI:10.1021/acsami.4c15598
PMID:39531380
Abstract

This study introduces a TaO-based self-rectifying memristor (SRM) with an AlO interfacial layer adopted to improve switching uniformity, read voltage margin, and long-term retention. The Pt/TaO/AlO/TiN (PTAT) device exhibits a 10 rectification ratio, 10 on/off ratio, 2 × 10 endurance, and retention of 10 s at 150 °C. A 3-layer 4 × 4 vertical resistive random access memory structure exhibits uniform switching parameters. The coefficient of variation (CV) for device-to-device measurements is 0.23 for the low resistance state (LRS) and 0.22 for the high resistance state (HRS), while for cycle-to-cycle measurements, the CV is 0.38 for the LRS and 0.11 for the HRS. Finally, the present study demonstrates the superior performance of the PTAT devices in the context of hardware-aware training for a fully connected neural network implementation. These advancements position the PTAT device as a promising candidate for high-density three-dimensional storage class memory and low-power neural networks, offering the consistent performance and reliability necessary for future high-density storage applications.

摘要

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