Hwang Hwiho, Yu Junsu, Youn Sangwook, Choi Woo Young, Kim Hyungjin
Division of Materials Science and Engineering and Department of Semiconductor Engineering, Hanyang University, Seoul, 04763, South Korea.
Department of Electrical and Computer Engineering and Inter-University Semiconductor Research Center (ISRC), Seoul National University, Seoul, 08826, South Korea.
Small. 2025 Mar;21(9):e2408618. doi: 10.1002/smll.202408618. Epub 2025 Feb 5.
As one of the data-intensive in-memory computing hardware, ternary content addressable memory (TCAM) stands out for its efficient in-memory-searching capability, enabling high-throughput and low-latency computing. However, TCAMs, especially those based on resistive non-volatile memories, face challenges in limited resistance ratio (R/R) that deteriorate sensing margin and energy efficiency. Addressing these issues, a TCAM cell composed of two memcapacitors (2C-TCAM) based on NAND flash array structure is proposed. The 2C-TCAM utilizes the memcapacitors coupled with the mature technology of flash cells for reliable operation and high-density (8F) array configuration. Thanks to the capacitive readout of memcapacitors, the 2C-TCAM achieves near-zero static power consumption and minimizes IR drop effect. Consequently, highly parallel and reliable search functionality can be obtained even in large arrays while preserving the sensing margin. Electrical characteristics and operation schemes of the proposed 2C-TCAM cell are validated through fabrication and measurements, and array operations are experimentally demonstrated using a 24 × 48 memcapacitor crossbar array with sensing circuits. Additionally, the system-level performance of the 2C-TCAM array is analyzed, considering the device programming accuracy. Search times of 47 ps and energy consumption of 11.7 fJ per bit are achieved by scaling down the device cell area to 1 µm.
作为数据密集型内存计算硬件之一，三态内容寻址存储器（TCAM）因其高效的内存搜索能力脱颖而出，可实现高通量和低延迟计算。然而，TCAM，尤其是基于电阻式非易失性存储器的TCAM，在有限的电阻比（R/R）上面临挑战，这会降低传感裕度和能源效率。为了解决这些问题，提出了一种基于NAND闪存阵列结构、由两个忆阻器（2C-TCAM）组成的TCAM单元。2C-TCAM利用忆阻器并结合闪存单元的成熟技术实现可靠运行和高密度（8F）阵列配置。得益于忆阻器的电容式读出，2C-TCAM实现了近乎零的静态功耗，并将IR降效应降至最低。因此，即使在大型阵列中也能获得高度并行且可靠的搜索功能，同时保持传感裕度。通过制造和测量验证了所提出的2C-TCAM单元的电气特性和操作方案，并使用带有传感电路的24×48忆阻器交叉阵列对阵列操作进行了实验演示。此外，考虑到器件编程精度，分析了2C-TCAM阵列的系统级性能。通过将器件单元面积缩小到1 µm，实现了47 ps的搜索时间和每位11.7 fJ的能耗。
