Hyun Gihwan, Alimkhanuly Batyrbek, Seo Donguk, Lee Minwoo, Bae Junseong, Lee Seunghyun, Patil Shubham, Hwang Youngcheol, Kadyrov Arman, Yoo Hyungyu, Devnath Anupom, Lee Yoonmyung, Lee Seunghyun
Department of Electronics and Information Convergence Engineering, College of Electronics and Information, Kyung Hee University, Yongin-si, Gyeonggi-do, 17104, Republic of Korea.
Department of Electronic Engineering, College of Electronics and Information, Kyung Hee University, Yongin-si, Gyeonggi-do, 17104, Republic of Korea.
Small. 2024 Aug;20(34):e2310943. doi: 10.1002/smll.202310943. Epub 2024 Apr 12.
The development of data-intensive computing methods imposes a significant load on the hardware, requiring progress toward a memory-centric paradigm. Within this context, ternary content-addressable memory (TCAM) can become an essential platform for high-speed in-memory matching applications of large data vectors. Compared to traditional static random-access memory (SRAM) designs, TCAM technology using non-volatile resistive memories (RRAMs) in two-transistor-two-resistor (2T2R) configurations presents a cost-efficient alternative. However, the limited sensing margin between the match and mismatch states in RRAM structures hinders the potential of using memory-based TCAMs for large-scale architectures. Therefore, this study proposes a practical device engineering method to improve the switching response of conductive-bridge memories (CBRAMs) integrated with existing complementary metal-oxide-semiconductor (CMOS) transistor technology. Importantly, this work demonstrates a significant improvement in memory window reaching 1.87 × 10 by incorporating nanocavity arrays and modifying electrode geometry. Consequently, TCAM cells using nanocavity-enhanced CBRAM devices can exhibit a considerable increase in resistance ratio up to 6.17 × 10, thereby closely approximating the sensing metrics observed in SRAM-based TCAMs. The improved sensing capability facilitates the parallel querying of extensive data sets. TCAM array simulations using experimentally verified device models indicate a substantial sensing margin of 65× enabling a parallel search of 2048 bits.
数据密集型计算方法的发展给硬件带来了巨大负担，这就需要朝着以内存为中心的范式取得进展。在此背景下，三态内容可寻址存储器（TCAM）能够成为用于大数据向量高速内存匹配应用的关键平台。与传统的静态随机存取存储器（SRAM）设计相比，采用两晶体管两电阻（2T2R）配置的非易失性电阻式存储器（RRAM）的TCAM技术提供了一种经济高效的替代方案。然而，RRAM结构中匹配状态和不匹配状态之间有限的传感裕度阻碍了基于内存的TCAM在大规模架构中的应用潜力。因此，本研究提出了一种实用的器件工程方法，以改善与现有互补金属氧化物半导体（CMOS）晶体管技术集成的导电桥接存储器（CBRAM）的开关响应。重要的是，通过结合纳米腔阵列和修改电极几何形状，这项工作展示了存储窗口显著提高到1.87×10 。因此，使用纳米腔增强CBRAM器件的TCAM单元可以使电阻比大幅提高到6.17×10 ，从而非常接近基于SRAM的TCAM中观察到的传感指标。提高的传感能力有助于对大量数据集进行并行查询。使用经过实验验证的器件模型进行的TCAM阵列模拟表明，其传感裕度高达65倍，能够对2048位进行并行搜索。
