Kim Nam-Seog
Department of Information and Communication Engineering, School of Electrical and Computer Engineering, Chungbuk National University, Cheongju-si 28644, Republic of Korea.
Sensors (Basel). 2025 Mar 12;25(6):1748. doi: 10.3390/s25061748.
This paper presents a low-power CMOS receiver with a complex continuous-time delta-sigma ADC designed for IoT applications in the 2.4 GHz band. The architecture employs a quadrature bandpass continuous-time delta-sigma ADC optimized for Bluetooth Low Energy (BLE) standards, achieving an ENOB of 10.9 bits while consuming only 0.81 mW from a 1.0 V supply. The receiver demonstrates impressive performance metrics, including a sensitivity of -95 dBm at a 10⁻-bit error rate, an image rejection ratio of 54.2 dBc, and a spurious-free dynamic range of 79.8 dBc. Operating at a 1.5 MHz intermediate frequency with a 2 MHz bandwidth, the ADC achieves superior energy efficiency with a figure of merit (FOM) of 103.2 fJ/conv. Implemented in 28 nm CMOS technology, the complete receiver occupies 0.375 mm for the RF front-end and 0.145 mm for the ADC while consuming 4.08 mW total power, making it well suited for battery-powered IoT sensor nodes requiring both power efficiency and reliable wireless connectivity.
本文介绍了一种低功耗CMOS接收器，其带有一个为2.4 GHz频段的物联网应用而设计的复杂连续时间Delta-Sigma模数转换器（ADC）。该架构采用了针对低功耗蓝牙（BLE）标准优化的正交带通连续时间Delta-Sigma ADC，在从1.0 V电源获取仅0.81 mW功耗的情况下实现了10.9位的有效噪声带宽（ENOB）。该接收器展示了令人印象深刻的性能指标，包括在误码率为10⁻时灵敏度为-95 dBm、镜像抑制比为54.2 dBc以及无杂散动态范围为79.8 dBc。该ADC在1.5 MHz中频和2 MHz带宽下工作，以103.2 fJ/conv的品质因数（FOM）实现了卓越的能量效率。采用28 nm CMOS技术实现，完整的接收器中射频前端占用0.375 mm²，ADC占用0.145 mm²，同时总功耗为4.08 mW，非常适合需要功率效率和可靠无线连接的电池供电物联网传感器节点。
