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0.91伏基准电压,3.3ppm/°C的带二阶补偿和改进电源抑制比的亚带隙基准电压源。

0.91 V reference, 3.3 ppm/°C Sub-BGR with second-order compensation and improved PSRR.

作者信息

Ganesh Chokkakula, S Satheesh Kumar, Shanthi A, Vali Sk Shoukath

机构信息

Deptartment of Electronics and Communication Engineering, VNR Vignana Jyothi Institute of Engineering and Technology, Hyderabad, India.

School of Electronics Engineering, VIT-AP University, Amaravati, Andhra Pradesh, 522237, India.

出版信息

Sci Rep. 2025 Aug 23;15(1):30998. doi: 10.1038/s41598-025-16310-z.

Abstract

This work introduces the design and analysis of a Bandgap Reference (BGR) circuit with better temperature stability and reduced process variation. The second-order compensation method is implemented for design through an optimized error amplifier and a resistor network with a significantly better temperature coefficient performance. The startup mechanism is carefully designed for ensured strong and stable circuit performance under every variation of process-voltage-temperature (PVT). The proposed BGR is compared with conventional methods such as CM-BGR, Cascaded CM-BGR, Operational Amplifier based-BGR, and Sub-BGR with respect to Temperature Coefficient (TC), Power Supply Rejection Ratio (PSRR), and line regulation. The proposed Sub-BGR is shown to provide 3.33 ppm/°C (58.97-78.79% less) temperature coefficient, 1.12×-6.02× improvement in PSRR, and 96% improved line regulation with 723 µV variation, thus showing improved performance compared to Operational Amplifier based-BGR and Sub-BGR techniques, rendering the proposed BGR highly appropriate for high-precision analog and mixed-signal applications. The proposed BGR is simulated and implemented by Synopsys custom compile using 32 nm CMOS technology.

摘要

本文介绍了一种具有更好温度稳定性和更低工艺变化的带隙基准(BGR)电路的设计与分析。通过优化误差放大器和具有显著更好温度系数性能的电阻网络实现了二阶补偿方法用于设计。精心设计了启动机制,以确保在工艺 - 电压 - 温度(PVT)的各种变化下电路性能强大且稳定。将所提出的BGR与传统方法(如CM - BGR、级联CM - BGR、基于运算放大器的BGR和子BGR)在温度系数(TC)、电源抑制比(PSRR)和线性调整方面进行了比较。结果表明,所提出的子BGR提供3.33 ppm/°C(低58.97 - 78.79%)的温度系数,PSRR提高了1.12× - 6.02×,线性调整提高了96%,变化为723 µV,因此与基于运算放大器的BGR和子BGR技术相比性能有所提高,这使得所提出的BGR非常适合高精度模拟和混合信号应用。所提出的BGR使用32 nm CMOS技术通过Synopsys定制编译进行了仿真和实现。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/4124/12375044/53563fd7763d/41598_2025_16310_Fig1_HTML.jpg

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