Lee Jinhyoung, Kim Gunhyoung, Seok Hyunho, Han Sujeong, Shim Hyunwoo, Cha Yoonmi, Son Sihoon, Choi Hyunbin, Grzeszczyk Magdalena, Bogucki Aleksander, Choi Yunseok, Kim Seungil, Lee Hyeonjeong, Park Chaerin, Kim Geonwook, Hwang Hosin, Kim Hyunho, Lee Dongho, Son Seowoo, Back Geumji, Shin Hyelim, Choi Donghwan, Ollier Alexina, Kim Yeon-Ji, Fang Lei, Han Gyuho, Jung Goo-Eun, Lee Youngi, Kim Hyeong-U, Watanabe Kenji, Taniguchi Takashi, Bae Sanghoon, Heinrich Andreas, Jang Won-Jun, Kim Taesung
School of Mechanical Engineering, Sungkyunkwan University (SKKU), Suwon-si, Gyeonggi-do, 16419, South Korea.
Center for Quantum Nanoscience, Institute for Basic Science (IBS), Seoul, 03760, South Korea.
Adv Sci (Weinh). 2025 Aug 26:e10961. doi: 10.1002/advs.202510961.
Owing to the evolution of data-driven technologies, including the large language models, generative artificial intelligence, autonomous driving, and the internet of things requires advanced memory technology. However, conventional memory device structures and fabrication process have significant limitations for high-density integration. Herein, this study reports the monolithically-integrated 1-selector and 1-resistive (1S1R) synaptic memory in van der Waals (vdW) heterostructure, which overcomes the conventional limitations of device integration technologies. Single-step direct synthesis of vdW heterostructure and its corresponding 1S1R cell is fabricated via plasma-enhanced lattice-distortion. Scanning-transmission electron microscopy, and X-ray photoelectron spectroscopy are correlatively applied to observe the effects of plasma-enhanced nano-crystallization of bulk vdW VSe. Furthermore, bipolar resistive switching dynamics have been spatially resolved with conductive atomic force microscopy. Furthermore, the artificial vdW heterostructure exhibits the synaptic functionality with interfacial charge accumulation at the 2D/3D interface, enabling linear weight updates across multiple resistance states with minimal nonlinearity. In conclusion, it envision that the monolithically-integrated 1S1R cell can offers a systematic device platform for next-generation vdW electronics and its corresponding monolithic 3D integration.
