Wu Yue, Xiang Jie, Yang Chen, Lu Wei, Lieber Charles M
Department of Chemistry and Chemical Biology, Harvard University, Cambridge, Massachusetts 02138, USA.
Nature. 2004 Jul 1;430(6995):61-5. doi: 10.1038/nature02674.
Substantial effort has been placed on developing semiconducting carbon nanotubes and nanowires as building blocks for electronic devices--such as field-effect transistors--that could replace conventional silicon transistors in hybrid electronics or lead to stand-alone nanosystems. Attaching electric contacts to individual devices is a first step towards integration, and this step has been addressed using lithographically defined metal electrodes. Yet, these metal contacts define a size scale that is much larger than the nanometre-scale building blocks, thus limiting many potential advantages. Here we report an integrated contact and interconnection solution that overcomes this size constraint through selective transformation of silicon nanowires into metallic nickel silicide (NiSi) nanowires. Electrical measurements show that the single crystal nickel silicide nanowires have ideal resistivities of about 10 microOmega cm and remarkably high failure-current densities, >10(8) A cm(-2). In addition, we demonstrate the fabrication of nickel silicide/silicon (NiSi/Si) nanowire heterostructures with atomically sharp metal-semiconductor interfaces. We produce field-effect transistors based on those heterostructures in which the source-drain contacts are defined by the metallic NiSi nanowire regions. Our approach is fully compatible with conventional planar silicon electronics and extendable to the 10-nm scale using a crossed-nanowire architecture.
人们已付出巨大努力来开发半导体碳纳米管和纳米线,将其作为电子器件(如场效应晶体管)的构建模块,这些器件有望在混合电子学中取代传统硅晶体管,或促成独立的纳米系统。将电触点连接到单个器件是实现集成的第一步,这一步骤已通过光刻定义的金属电极得以解决。然而,这些金属触点所确定的尺寸尺度远大于纳米级构建模块,从而限制了诸多潜在优势。在此,我们报告一种集成触点和互连解决方案,该方案通过将硅纳米线选择性转化为金属硅化镍(NiSi)纳米线来克服这一尺寸限制。电学测量表明,单晶硅化镍纳米线具有约10微欧厘米的理想电阻率以及显著高的故障电流密度,大于10⁸安/厘米²。此外,我们展示了具有原子级锐金属 - 半导体界面的硅化镍/硅(NiSi/Si)纳米线异质结构的制造。我们基于这些异质结构制造了场效应晶体管,其中源极 - 漏极触点由金属NiSi纳米线区域定义。我们的方法与传统平面硅电子学完全兼容,并可使用交叉纳米线架构扩展到10纳米尺度。