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光刻图案化纳米线电沉积:一种在电介质上图案化电连续金属纳米线的方法。

Lithographically patterned nanowire electrodeposition: a method for patterning electrically continuous metal nanowires on dielectrics.

作者信息

Xiang Chenxiang, Kung Sheng-Chin, Taggart David K, Yang Fan, Thompson Michael A, Güell Aleix G, Yang Yongan, Penner Reginald M

机构信息

Department of Chemistry, University of California, Irvine, California 92697-2025, USA.

出版信息

ACS Nano. 2008 Sep 23;2(9):1939-49. doi: 10.1021/nn800394k.

DOI:10.1021/nn800394k
PMID:19206435
Abstract

Lithographically patterned nanowire electrodeposition (LPNE) is a new method for fabricating polycrystalline metal nanowires using electrodeposition. In LPNE, a sacrificial metal (M(1)=silver or nickel) layer, 5-100 nm in thickness, is first vapor deposited onto a glass, oxidized silicon, or Kapton polymer film. A (+) photoresist (PR) layer is then deposited, photopatterned, and the exposed Ag or Ni is removed by wet etching. The etching duration is adjusted to produce an undercut approximately 300 nm in width at the edges of the exposed PR. This undercut produces a horizontal trench with a precisely defined height equal to the thickness of the M(1) layer. Within this trench, a nanowire of metal M(2) is electrodeposited (M(2)=gold, platinum, palladium, or bismuth). Finally the PR layer and M(1) layer are removed. The nanowire height and width can be independently controlled down to minimum dimensions of 5 nm (h) and 11 nm (w), for example, in the case of platinum. These nanowires can be 1 cm in total length. We measure the temperature-dependent resistance of 100 microm sections of Au and Pd wires in order to estimate an electrical grain size for comparison with measurements by X-ray diffraction and transmission electron microscopy. Nanowire arrays can be postpatterned to produce two-dimensional arrays of nanorods. Nanowire patterns can also be overlaid one on top of another by repeating the LPNE process twice in succession to produce, for example, arrays of low-impedance, nanowire-nanowire junctions.

摘要

光刻图案化纳米线电沉积(LPNE)是一种利用电沉积制造多晶金属纳米线的新方法。在LPNE中,首先将厚度为5 - 100纳米的牺牲金属(M(1)=银或镍)层气相沉积到玻璃、氧化硅或聚酰亚胺聚合物薄膜上。然后沉积一层(+)光刻胶(PR)层,进行光刻图案化,通过湿法蚀刻去除暴露的银或镍。调整蚀刻时间,以在暴露的PR边缘产生宽度约为300纳米的底切。这种底切产生一个水平沟槽,其高度精确等于M(1)层的厚度。在这个沟槽内,电沉积金属M(2)的纳米线(M(2)=金、铂、钯或铋)。最后去除PR层和M(1)层。例如,对于铂,纳米线的高度和宽度可以独立控制到最小尺寸5纳米(h)和11纳米(w)。这些纳米线的总长度可以达到1厘米。我们测量了100微米长的金和钯线的电阻随温度的变化,以估计电晶粒尺寸,以便与X射线衍射和透射电子显微镜测量结果进行比较。纳米线阵列可以进行后图案化,以产生纳米棒的二维阵列。通过连续两次重复LPNE工艺,纳米线图案也可以相互叠加,例如,产生低阻抗的纳米线 - 纳米线结阵列。

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