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基于忆阻器的纳米级交叉开关存储器的写入和读取。

Writing to and reading from a nano-scale crossbar memory based on memristors.

作者信息

Vontobel Pascal O, Robinett Warren, Kuekes Philip J, Stewart Duncan R, Straznicky Joseph, Stanley Williams R

机构信息

Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA 94304, USA.

出版信息

Nanotechnology. 2009 Oct 21;20(42):425204. doi: 10.1088/0957-4484/20/42/425204. Epub 2009 Sep 25.

Abstract

We present a design study for a nano-scale crossbar memory system that uses memristors with symmetrical but highly nonlinear current-voltage characteristics as memory elements. The memory is non-volatile since the memristors retain their state when un-powered. In order to address the nano-wires that make up this nano-scale crossbar, we use two coded demultiplexers implemented using mixed-scale crossbars (in which CMOS-wires cross nano-wires and in which the crosspoint junctions have one-time configurable memristors). This memory system does not utilize the kind of devices (diodes or transistors) that are normally used to isolate the memory cell being written to and read from in conventional memories. Instead, special techniques are introduced to perform the writing and the reading operation reliably by taking advantage of the nonlinearity of the type of memristors used. After discussing both writing and reading strategies for our memory system in general, we focus on a 64 x 64 memory array and present simulation results that show the feasibility of these writing and reading procedures. Besides simulating the case where all device parameters assume exactly their nominal value, we also simulate the much more realistic case where the device parameters stray around their nominal value: we observe a degradation in margins, but writing and reading is still feasible. These simulation results are based on a device model for memristors derived from measurements of fabricated devices in nano-scale crossbars using Pt and Ti nano-wires and using oxygen-depleted TiO(2) as the switching material.

摘要

我们展示了一种用于纳米级交叉开关存储系统的设计研究,该系统使用具有对称但高度非线性电流 - 电压特性的忆阻器作为存储元件。由于忆阻器在未通电时保持其状态,所以该存储器是非易失性的。为了寻址构成此纳米级交叉开关的纳米线,我们使用了两个采用混合尺度交叉开关实现的编码解复用器(其中CMOS线与纳米线交叉,并且交叉点结具有一次性可配置的忆阻器)。该存储系统不使用传统存储器中通常用于隔离正在写入和读取的存储单元的那种器件(二极管或晶体管)。相反,通过利用所使用的忆阻器类型的非线性,引入了特殊技术来可靠地执行写入和读取操作。在总体讨论了我们存储系统的写入和读取策略之后,我们重点关注一个64×64的存储阵列,并给出了模拟结果,这些结果表明了这些写入和读取过程的可行性。除了模拟所有器件参数都恰好取其标称值的情况外,我们还模拟了器件参数在其标称值附近波动的更实际情况:我们观察到裕度有所下降,但写入和读取仍然可行。这些模拟结果基于从使用Pt和Ti纳米线以及使用贫氧TiO(2)作为开关材料的纳米级交叉开关中制造的器件的测量得出的忆阻器器件模型。

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