National Institute of Standards and Technology-Semiconductor Electronics Division, 100 Bureau Drive, Stop 8120, Gaithersburg, Maryland 20899-8120, USA.
Lab Chip. 2010 Oct 7;10(19):2618-21. doi: 10.1039/c0lc00029a. Epub 2010 Aug 11.
A nanofluidic technology for the on-chip size separation and metrology of nanoparticles is demonstrated. A nanofluidic channel was engineered with a depth profile approximated by a staircase function. Numerous stepped reductions in channel depth were used to separate a bimodal mixture of nanoparticles by nanofluidic size exclusion. Epifluorescence microscopy was used to map the size exclusion positions of individual nanoparticles to corresponding channel depths, enabling measurement of the nanoparticle size distributions and validation of the size separation mechanism.
本文展示了一种用于在片上对纳米颗粒进行尺寸分离和计量的纳流控技术。通过工程设计,纳流道具有近似阶梯函数的深度轮廓。利用纳流道深度的多次阶跃式减小,通过纳流道尺寸排阻实现了双模态纳米颗粒混合物的分离。利用荧光显微镜对单个纳米颗粒的尺寸排阻位置进行映射,对应到相应的通道深度,从而实现了纳米颗粒尺寸分布的测量和尺寸分离机制的验证。