Won Sunghwan, Son Daeho, Kim Eunkyeom, Kim Jeongho, Lee Kyungsu, Park Kyoungwan
Department of Nano-Science and Technology, University of Seoul, Seoul 130-743, Korea.
J Nanosci Nanotechnol. 2011 Jan;11(1):314-7. doi: 10.1166/jnn.2011.3159.
At present, the nano floating gate memory (NFGM) device has shown a great promise as a ultra-dense, high-endurance memory device for low-power applications. As the size of the NFGM reduced, the short channel effect became one of the critical issues in the base Field Effect Transistor (FET). Schottky barrier tunneling transistor (SBTT) can improve the controllability of the short channel effect. In this work, we studied nano floating gate memory based on the SBTT. Erbium silicide was employed instead of the conventional heavily doped S/D. The NFGM device based on the SBTT used Si nanocrystals as charge storages. The subthreshold slope and the threshold voltage of the SBTT-NFGM were 90 mV/dec. and 0.2 V, respectively. The memory window appeared about 4 V after the applied write/erase bias at +/- 11 V for 500 ms. The write/erase speeds of the memory device were 50 ms and 200 ms at +/- 13 V, respectively. We also analyzed the retention characteristics of the Schottky barrier tunneling transistor nonvolatile floating gate memory according to the various side walls.
目前，纳米浮栅存储器（NFGM）器件作为一种用于低功耗应用的超密集、高耐久性存储器件已展现出巨大潜力。随着NFGM尺寸的减小，短沟道效应成为基础场效应晶体管（FET）中的关键问题之一。肖特基势垒隧穿晶体管（SBTT）可以改善短沟道效应的可控性。在这项工作中，我们研究了基于SBTT的纳米浮栅存储器。采用硅化铒替代传统的重掺杂源漏区。基于SBTT的NFGM器件使用硅纳米晶体作为电荷存储单元。SBTT-NFGM的亚阈值斜率和阈值电压分别为90 mV/dec.和0.2 V。在施加±11 V的写/擦除偏压500 ms后，存储窗口约为4 V。该存储器件在±13 V时的写/擦除速度分别为50 ms和200 ms。我们还根据不同的侧壁分析了肖特基势垒隧穿晶体管非易失性浮栅存储器的保持特性。
