Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China.
ACS Nano. 2012 May 22;6(5):4013-9. doi: 10.1021/nn300320j. Epub 2012 Apr 13.
The use of carbon nanotube (CNT)-based field-effect transistors (FETs) as pass transistors is investigated. Logic gates are designed and constructed with these CNT FETs in the pass-transistor logic (PTL) style. Because two of the three terminals of every CNT FET are used as inputs, the efficiency per transistor in PTL circuits is significantly improved. With the PTL style, a single pair of FETS, one n-type and one p-type, is sufficient to construct high-performance AND or OR gates in which the measured output voltages are consistent with those quantitatively derived using the characteristics of the pair of the constituent n- and p-FETs. A one-bit full subtractor, which requires a total of 28 FETs to construct in the usual CMOS circuit, is realized on individual CNTs for the first time using the PTL style with only three pairs of n- and p-FETs.
研究了基于碳纳米管(CNT)的场效应晶体管(FET)作为传输晶体管的应用。采用这些 CNT FET 以传输晶体管逻辑(PTL)的方式设计和构建逻辑门。由于每个 CNT FET 的三个端子中的两个用作输入,因此 PTL 电路中每个晶体管的效率显著提高。采用 PTL 方式,仅使用一对 n 型和 p 型 FET 就足以构建高性能的与或门,其测量输出电压与使用组成的 n 型和 p 型 FET 的特性定量推导的输出电压一致。首次使用 PTL 方式,仅使用三对 n 型和 p 型 FET,在单个 CNT 上实现了总共需要 28 个 FET 才能构建的全减器。