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用于脑电图和电阻抗断层成像的有源电极集成电路,可连续监测接触阻抗。

Active electrode IC for EEG and electrical impedance tomography with continuous monitoring of contact impedance.

作者信息

Guermandi Marco, Cardu Roberto, Franchi Scarselli Eleonora, Guerrieri Roberto

出版信息

IEEE Trans Biomed Circuits Syst. 2015 Feb;9(1):21-33. doi: 10.1109/TBCAS.2014.2311836. Epub 2014 May 19.

DOI:10.1109/TBCAS.2014.2311836
PMID:24860040
Abstract

The IC presented integrates the front-end for EEG and Electrical Impedance Tomography (EIT) acquisition on the electrode, together with electrode-skin contact impedance monitoring and EIT current generation, so as to improve signal quality and integration of the two techniques for brain imaging applications. The electrode size is less than 2 cm(2) and only 4 wires connect the electrode to the back-end. The readout circuit is based on a Differential Difference Amplifier and performs single-ended amplification and frequency division multiplexing of the three signals that are sent to the back-end on a single wire which also provides power supply. Since the system's CMRR is a function of each electrode's gain accuracy, an analysis is performed on how this is influenced by mismatches in passive and active components. The circuit is fabricated in 0.35 μm CMOS process and occupies 4 mm(2), the readout circuit consumes 360 μW, the input referred noise for bipolar EEG signal acquisition is 0.56 μVRMS between 0.5 and 100 Hz and almost halves if only EEG signal is acquired.

摘要

所展示的集成电路(IC)在电极上集成了用于脑电图(EEG)和电阻抗断层成像(EIT)采集的前端,以及电极 - 皮肤接触阻抗监测和EIT电流生成功能,以提高信号质量以及这两种脑成像技术的集成度。电极尺寸小于2平方厘米,且仅有4根导线将电极连接到后端。读出电路基于差分差分放大器,对三个信号进行单端放大和频分复用,这些信号通过单根导线发送到后端,该导线同时还提供电源。由于系统的共模抑制比(CMRR)是每个电极增益精度的函数,因此分析了无源和有源元件的失配对其的影响。该电路采用0.35μm互补金属氧化物半导体(CMOS)工艺制造,占用面积为4平方毫米,读出电路功耗为360μW,双极EEG信号采集的输入参考噪声在0.5至100Hz之间为0.56μVRMS,若仅采集EEG信号,该噪声几乎减半。

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