Energy Materials and Surface Sciences Unit (EMSS), Okinawa Institute of Science and Technology Graduate University (OIST) , 1919-1 Tancha, Onna-son, Okinawa 904-0495, Japan.
ACS Appl Mater Interfaces. 2015 Jan 28;7(3):1833-40. doi: 10.1021/am507528e. Epub 2015 Jan 15.
The molecular order of organic semiconductors at the gate dielectric is the most critical factor determining carrier mobility in thin film transistors since the conducting channel forms at the dielectric interface. Despite its fundamental importance, this semiconductor-insulator interface is not well understood, primarily because it is buried within the device. We fabricated dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT) thin film transistors by thermal evaporation in vacuum onto substrates held at different temperatures and systematically correlated the extracted charge mobility to the crystal grain size and crystal orientation. As a result, we identify a molecular layer of flat-lying DNTT molecules at the semiconductor-insulator interface. It is likely that such a layer might form in other material systems as well, and could be one of the factors reducing charge transport. Controlling this interfacial flat-lying layer may raise the ultimate possible device performance for thin film devices.
有机半导体在栅介质中的分子有序性是决定薄膜晶体管载流子迁移率的最关键因素,因为导电沟道在介电界面形成。尽管这一点至关重要,但由于该半导体-绝缘体界面被掩埋在器件内部,因此人们对其并不了解,主要是因为这一点。我们通过真空热蒸发在不同温度下的衬底上制造了二萘并[2,3-b:2',3'-f]噻吩[3,2-b]噻吩(DNTT)薄膜晶体管,并系统地将提取的电荷迁移率与晶粒尺寸和晶体取向相关联。结果表明,我们在半导体-绝缘体界面处发现了一层排列整齐的 DNTT 分子。很可能在其他材料体系中也会形成这样的层,并且可能是降低电荷输运的因素之一。控制这种界面层的平整排列可能会提高薄膜器件的最终可能的器件性能。