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通过等离子体增强原子层沉积原位形成SiO中间层的HfO/Ge叠层的界面、电学和能带对准特性

Interfacial, Electrical, and Band Alignment Characteristics of HfO/Ge Stacks with In Situ-Formed SiO Interlayer by Plasma-Enhanced Atomic Layer Deposition.

作者信息

Cao Yan-Qiang, Wu Bing, Wu Di, Li Ai-Dong

机构信息

National Laboratory of Solid State Microstructures and Department of Materials Science and Engineering, College of Engineering and Applied sciences, Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, 210093, People's Republic of China.

出版信息

Nanoscale Res Lett. 2017 Dec;12(1):370. doi: 10.1186/s11671-017-2083-z. Epub 2017 May 25.

DOI:10.1186/s11671-017-2083-z
PMID:28549375
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC5445033/
Abstract

In situ-formed SiO was introduced into HfO gate dielectrics on Ge substrate as interlayer by plasma-enhanced atomic layer deposition (PEALD). The interfacial, electrical, and band alignment characteristics of the HfO/SiO high-k gate dielectric stacks on Ge have been well investigated. It has been demonstrated that Si-O-Ge interlayer is formed on Ge surface during the in situ PEALD SiO deposition process. This interlayer shows fantastic thermal stability during annealing without obvious Hf-silicates formation. In addition, it can also suppress the GeO degradation. The electrical measurements show that capacitance equivalent thickness of 1.53 nm and a leakage current density of 2.1 × 10 A/cm at gate bias of V + 1 V was obtained for the annealed sample. The conduction (valence) band offsets at the HfO/SiO/Ge interface with and without PDA are found to be 2.24 (2.69) and 2.48 (2.45) eV, respectively. These results indicate that in situ PEALD SiO may be a promising interfacial control layer for the realization of high-quality Ge-based transistor devices. Moreover, it can be demonstrated that PEALD is a much more powerful technology for ultrathin interfacial control layer deposition than MOCVD.

摘要

通过等离子体增强原子层沉积(PEALD)将原位形成的SiO作为中间层引入到Ge衬底上的HfO栅极电介质中。对Ge上的HfO/SiO高k栅极电介质堆叠的界面、电学和能带对准特性进行了深入研究。结果表明,在原位PEALD SiO沉积过程中,Ge表面形成了Si-O-Ge中间层。该中间层在退火过程中表现出出色的热稳定性,没有明显的Hf硅酸盐形成。此外,它还可以抑制GeO的降解。电学测量表明,退火后的样品在栅极偏压为V + 1 V时,电容等效厚度为1.53 nm,漏电流密度为2.1×10 A/cm。发现有和没有等离子体处理退火(PDA)时,HfO/SiO/Ge界面处的导带(价带)偏移分别为2.24(2.69)和2.48(2.45)eV。这些结果表明,原位PEALD SiO可能是实现高质量Ge基晶体管器件的一种有前途的界面控制层。此外,可以证明,与金属有机化学气相沉积(MOCVD)相比,PEALD是一种用于超薄界面控制层沉积的更强大的技术。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/1e5bffcbf8d7/11671_2017_2083_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/f6ec74722c75/11671_2017_2083_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/8b23a15de4fd/11671_2017_2083_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/420fb64e4d1c/11671_2017_2083_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/2cee540fe743/11671_2017_2083_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/1e5bffcbf8d7/11671_2017_2083_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/f6ec74722c75/11671_2017_2083_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/8b23a15de4fd/11671_2017_2083_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/420fb64e4d1c/11671_2017_2083_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/2cee540fe743/11671_2017_2083_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3956/5445033/1e5bffcbf8d7/11671_2017_2083_Fig5_HTML.jpg

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本文引用的文献

1
Selective Passivation of GeO2/Ge Interface Defects in Atomic Layer Deposited High-k MOS Structures.原子层沉积高k金属氧化物半导体结构中GeO2/Ge界面缺陷的选择性钝化
ACS Appl Mater Interfaces. 2015 Sep 23;7(37):20499-506. doi: 10.1021/acsami.5b06087. Epub 2015 Sep 9.