Kim Daehyeok, Song Minkyu, Choe Byeongseong, Kim Soo Youn
Department of Semiconductor Science, Dongguk University-Seoul, Seoul 04620, Korea.
Department of Information and Telecommunication Engineering, Dongguk University-Seoul, Seoul 04620, Korea.
Sensors (Basel). 2017 Jun 25;17(7):1497. doi: 10.3390/s17071497.
In this paper, we present a multi-resolution mode CMOS image sensor (CIS) for intelligent surveillance system (ISS) applications. A low column fixed-pattern noise (CFPN) comparator is proposed in 8-bit two-step single-slope analog-to-digital converter (TSSS ADC) for the CIS that supports normal, 1/2, 1/4, 1/8, 1/16, 1/32, and 1/64 mode of pixel resolution. We show that the scaled-resolution images enable CIS to reduce total power consumption while images hold steady without events. A prototype sensor of 176 × 144 pixels has been fabricated with a 0.18 μm 1-poly 4-metal CMOS process. The area of 4-shared 4T-active pixel sensor (APS) is 4.4 μm × 4.4 μm and the total chip size is 2.35 mm × 2.35 mm. The maximum power consumption is 10 mW (with full resolution) with supply voltages of 3.3 V (analog) and 1.8 V (digital) and 14 frame/s of frame rates.
在本文中,我们展示了一种用于智能监控系统(ISS)应用的多分辨率模式互补金属氧化物半导体图像传感器(CIS)。针对支持正常、1/2、1/4、1/8、1/16、1/32和1/64像素分辨率模式的CIS,在8位两步单斜率模数转换器(TSSS ADC)中提出了一种低列固定模式噪声(CFPN)比较器。我们表明,在无事件时图像保持稳定的情况下,缩放分辨率图像可使CIS降低总功耗。采用0.18μm 1-多晶硅4-金属互补金属氧化物半导体工艺制造了一个176×144像素的原型传感器。4共享4T有源像素传感器(APS)的面积为4.4μm×4.4μm,芯片总面积为2.35mm×2.35mm。在3.3V(模拟)和1.8V(数字)的电源电压以及14帧/秒的帧率下,最大功耗为10mW(全分辨率)。