Li Xiaoran, Zhong Shunan, Morizio James
School of Information and Electronics, Beijing Institute of Technology, Beijing, 100081, China.
Department of Electrical and Computer Engineering, Duke University, Durham, NC, 27703, USA.
Biomed Eng Online. 2017 Aug 14;16(1):104. doi: 10.1186/s12938-017-0385-0.
Neural stimulation is an important method used to activate or inhibit action potentials of the neuronal anatomical targets found in the brain, central nerve and peripheral nerve. The neural stimulator system produces biphasic pulses that deliver balanced charge into tissue from single or multichannel electrodes. The timing and amplitude of these biphasic pulses are precisely controlled by the neural stimulator software or imbedded algorithms. Amplitude mismatch between the anodic current and cathodic current of the biphasic pulse will cause permanently damage for the neural tissues. The main goal of our circuit and layout design is to implement a 16-channel biphasic current mode programmable neural stimulator with calibration to minimize the current mismatch caused by inherent complementary metal oxide semiconductor (CMOS) manufacturing processes.
This paper presents a 16-channel constant current mode neural stimulator chip. Each channel consists of a 7-bit controllable current DAC used as sink and source current driver. To reduce the LSB quantization error and the current mismatch, an automatic calibration circuit and flow diagram is presented in this paper. There are two modes of operation of the stimulator chip-namely, stimulation mode and calibration mode. The chip also includes a digital interface used to control the stimulator parameters and calibration levels specific for each individual channel.
This stimulator Application Specific Integrated Circuit (ASIC) is designed and fabricated in a 0.18 μm High-Voltage CMOS technology that allows for ±20 V power supply. The full-scale stimulation current was designed to be at 1 mA per channel. The output current was shown to be constant throughout the timing cycles over a wide range of electrode load impedances. The calibration circuit was also designed to reduce the effect of CMOS process variation of the P-channel metal oxide semiconductor (PMOS) and N-channel metal oxide semiconductor (NMOS) devices that will result in charge delivery to have less than 0.13% error.
A 16-channel integrated biphasic neural stimulator chip with calibration is presented in this paper. The stimulator circuit design was simulated and the chip layout was completed. The chip layout was verified using design rules check (DRC) and layout versus schematic (LVS) design check using computer aided design (CAD) software. The test results we presented show constant current stimulation with charge balance error within 0.13% least-significant-bit (LSB). This LSB error was consistent throughout a variety stimulation patterns and electrode load impedances.
神经刺激是一种用于激活或抑制大脑、中枢神经和周围神经中神经元解剖靶点动作电位的重要方法。神经刺激器系统产生双相脉冲，通过单通道或多通道电极向组织输送平衡电荷。这些双相脉冲的时间和幅度由神经刺激器软件或嵌入式算法精确控制。双相脉冲的阳极电流和阴极电流之间的幅度失配会对神经组织造成永久性损伤。我们电路和布局设计的主要目标是实现一种带有校准功能的16通道双相电流模式可编程神经刺激器，以最小化由固有互补金属氧化物半导体（CMOS）制造工艺引起的电流失配。
本文介绍了一种16通道恒流模式神经刺激器芯片。每个通道由一个用作灌电流和源电流驱动器的7位可控电流数模转换器（DAC）组成。为了减少最低有效位（LSB）量化误差和电流失配，本文提出了一种自动校准电路和流程图。刺激器芯片有两种操作模式，即刺激模式和校准模式。该芯片还包括一个数字接口，用于控制刺激器参数以及每个单独通道特定的校准水平。
这款刺激器专用集成电路（ASIC）采用0.18μm高压CMOS技术进行设计和制造，允许±20V电源供电。每通道的满量程刺激电流设计为1mA。在各种电极负载阻抗范围内，输出电流在整个定时周期内保持恒定。校准电路的设计还旨在减少P沟道金属氧化物半导体（PMOS）和N沟道金属氧化物半导体（NMOS）器件的CMOS工艺变化的影响，这将使电荷输送误差小于0.13%。
本文介绍了一种带有校准功能的16通道集成双相神经刺激器芯片。对刺激器电路设计进行了仿真，并完成了芯片布局。使用计算机辅助设计（CAD）软件通过设计规则检查（DRC）和版图与原理图（LVS）设计检查对芯片布局进行了验证。我们给出的测试结果显示，恒流刺激的电荷平衡误差在最低有效位（LSB）的0.13%以内。在各种刺激模式和电极负载阻抗下，该最低有效位误差是一致的。
