Liu Xilin, Zhang Milin, Richardson Andrew G, Lucas Timothy H, Van der Spiegel Jan
IEEE Trans Biomed Circuits Syst. 2017 Aug;11(4):729-742. doi: 10.1109/TBCAS.2016.2622738. Epub 2016 Dec 16.
This paper presents a bidirectional brain machine interface (BMI) microsystem designed for closed-loop neuroscience research, especially experiments in freely behaving animals. The system-on-chip (SoC) consists of 16-channel neural recording front-ends, neural feature extraction units, 16-channel programmable neural stimulator back-ends, in-channel programmable closed-loop controllers, global analog-digital converters (ADC), and peripheral circuits. The proposed neural feature extraction units includes 1) an ultra low-power neural energy extraction unit enabling a 64-step natural logarithmic domain frequency tuning, and 2) a current-mode action potential (AP) detection unit with time-amplitude window discriminator. A programmable proportional-integral-derivative (PID) controller has been integrated in each channel enabling a various of closed-loop operations. The implemented ADCs include a 10-bit voltage-mode successive approximation register (SAR) ADC for the digitization of the neural feature outputs and/or local field potential (LFP) outputs, and an 8-bit current-mode SAR ADC for the digitization of the action potential outputs. The multi-mode stimulator can be programmed to perform monopolar or bipolar, symmetrical or asymmetrical charge balanced stimulation with a maximum current of 4 mA in an arbitrary channel configuration. The chip has been fabricated in 0.18 μ m CMOS technology, occupying a silicon area of 3.7 mm . The chip dissipates 56 μW/ch on average. General purpose low-power microcontroller with Bluetooth module are integrated in the system to provide wireless link and SoC configuration. Methods, circuit techniques and system topology proposed in this work can be used in a wide range of relevant neurophysiology research, especially closed-loop BMI experiments.
本文介绍了一种为闭环神经科学研究设计的双向脑机接口(BMI)微系统,特别是针对自由活动动物的实验。片上系统(SoC)由16通道神经记录前端、神经特征提取单元、16通道可编程神经刺激器后端、通道内可编程闭环控制器、全局模数转换器(ADC)和外围电路组成。所提出的神经特征提取单元包括:1)一个超低功耗神经能量提取单元,可实现64步自然对数域频率调谐;2)一个带时间 - 幅度窗口鉴别器的电流模式动作电位(AP)检测单元。每个通道集成了一个可编程比例积分微分(PID)控制器,可实现各种闭环操作。所实现的ADC包括一个用于神经特征输出和/或局部场电位(LFP)输出数字化的10位电压模式逐次逼近寄存器(SAR)ADC,以及一个用于动作电位输出数字化的8位电流模式SAR ADC。多模式刺激器可被编程为在任意通道配置下执行单极或双极、对称或不对称电荷平衡刺激,最大电流为4 mA。该芯片采用0.18μm CMOS技术制造,占用硅面积为3.7平方毫米。芯片平均每通道功耗为56μW。系统中集成了带有蓝牙模块的通用低功耗微控制器,以提供无线链路和SoC配置。本文所提出的方法、电路技术和系统拓扑可用于广泛的相关神经生理学研究,特别是闭环BMI实验。