Nanoelectronics Group, Department of Informatics, University of Oslo, 0316 Oslo, Norway.
College of Information and Communication Engineering, Sungkyunkwan University, Suwon 16419, Korea.
Sensors (Basel). 2018 Nov 30;18(12):4199. doi: 10.3390/s18124199.
This paper presents a second-order discrete-time Sigma-Delta (SD) Analog-to-Digital Converter (ADC) with over 80 dB Signal to Noise Ratio (SNR), which is applied in a signal conditioning IC for automotive piezo-resistive pressure sensors. To reduce the flicker noise of the structure, choppers are used in every stage of the high gain amplifiers. Besides, to reduce the required area and power, only the CIC filter structure is adopted as a decimation filter. This filter has a configurable structure that can be applied to different data rates and input signal bandwidths. The proposed ADC was fabricated and measured in a 0.18-µm CMOS process. Due to the application of only a CIC filter, the total active area of the SD-ADC and reference generator is 0.49 mm² where the area of the decimation filter is only 0.075 mm². For the input signal bandwidth of 1.22 kHz, it achieved over 80 dB SNR in a 2.5 MHz sampling frequency while consuming 646 µW power.
本文提出了一种应用于汽车压阻式压力传感器信号调理 IC 的二阶离散时间 Sigma-Delta (SD) 模数转换器 (ADC)，其信噪比 (SNR) 超过 80 dB。为了降低结构的闪烁噪声，每级高增益放大器都采用斩波器。此外，为了减小所需的面积和功耗，仅采用 CIC 滤波器结构作为抽取滤波器。该滤波器具有可配置的结构，可应用于不同的数据速率和输入信号带宽。所提出的 ADC 采用 0.18-µm CMOS 工艺进行制造和测量。由于仅采用 CIC 滤波器，SD-ADC 和参考发生器的总有源面积为 0.49 mm²，其中抽取滤波器的面积仅为 0.075 mm²。对于输入信号带宽为 1.22 kHz 的情况，在 2.5 MHz 的采样频率下实现了超过 80 dB 的 SNR，同时消耗的功率为 646 µW。
