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用于简单逻辑器件的选择性金属化二维材料。

Selectively Metallized 2D Materials for Simple Logic Devices.

作者信息

Dathbun Ajjiporn, Kim Youngchan, Choi Yongsuk, Sun Jia, Kim Seongchan, Kang Byunggil, Kang Moon Sung, Hwang Do Kyung, Lee Sungjoo, Lee Changgu, Cho Jeong Ho

机构信息

Department of Chemical and Biomolecular Engineering , Sogang University , Seoul 04107 , Korea.

Center for Opto-Electronic Materials and Devices, Post-Silicon Semiconductor Institute , Korea Institute of Science and Technology (KIST) , Seoul 02792 , Korea.

出版信息

ACS Appl Mater Interfaces. 2019 May 22;11(20):18571-18579. doi: 10.1021/acsami.9b03078. Epub 2019 May 13.

Abstract

We herein demonstrate, for the first time, transparent, flexible, and large-area monolithic MoS transistors and logic gates. Each single transistor consists of only two components: a monolithic chemical vapor deposition-grown MoS and an ion gel. Additional electrode materials are not required. The uniqueness of the device configuration is attributed to two factors. One is that a MoS layer is a semiconductor, but it can be doped degenerately; monolithic MoS can thus serve as both the electrodes and the channel of a transistor via selective doping of the material at certain positions. The other is the use of an electrolyte gate dielectric that permits effective gating (<3 V) even from an electrode coplanar with the channel. The resulting monolithic MoS transistors yield excellent device performance, including a maximum mobility of 1.5 cm/V s, an on-off ratio of 10, and a turn-on voltage of -0.69 V. This unique transistor architecture was successfully applied to various semiconductors such as ReS and indium-gallium-zinc oxide. Furthermore, the presented devices exhibit excellent mechanical, operational, and environmental stabilities. Fabrication of complex logic circuits (NOT, NAND, and NOR gates) by integration of the monolithic MoS transistors is demonstrated. Finally, the monolithic MoS transistor was connected to drive red, green, and blue light-emitting diode pixels, which yielded high luminance at a low voltage (<3 V). We believe that the unique architecture of the devices provides a facile way for low-cost, flexible, and high-performance two-dimensional electronics.

摘要

我们在此首次展示了透明、柔性且大面积的单片式二硫化钼晶体管和逻辑门。每个单个晶体管仅由两个组件组成:通过单片化学气相沉积生长的二硫化钼和离子凝胶。不需要额外的电极材料。这种器件结构的独特性归因于两个因素。一个是二硫化钼层是半导体,但它可以进行简并掺杂;因此,通过在特定位置对材料进行选择性掺杂,单片式二硫化钼既可以用作晶体管的电极,也可以用作沟道。另一个是使用了电解质栅极电介质,即使从与沟道共面的电极也能实现有效的栅控(<3 V)。由此产生的单片式二硫化钼晶体管具有出色的器件性能,包括最大迁移率为1.5 cm²/V·s、开/关比为10以及开启电压为 -0.69 V。这种独特的晶体管架构已成功应用于各种半导体,如二硫化铼和铟镓锌氧化物。此外,所展示的器件表现出优异的机械、操作和环境稳定性。通过集成单片式二硫化钼晶体管展示了复杂逻辑电路(非门、与非门和或非门)的制造。最后,将单片式二硫化钼晶体管连接以驱动红色、绿色和蓝色发光二极管像素,在低电压(<3 V)下产生了高亮度。我们相信,器件的独特架构为低成本、柔性和高性能的二维电子学提供了一种简便的方法。

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