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用于逻辑电路的具有分裂栅极的全二维ReS晶体管。

All-2D ReS transistors with split gates for logic circuitry.

作者信息

Kwon Junyoung, Shin Yongjun, Kwon Hyeokjae, Lee Jae Yoon, Park Hyunik, Watanabe Kenji, Taniguchi Takashi, Kim Jihyun, Lee Chul-Ho, Im Seongil, Lee Gwan-Hyoung

机构信息

Department of Materials Science and Engineering, Yonsei University, Seoul, 03722, Korea.

Department of Materials Science and Engineering, Seoul National University, Seoul, 08826, Korea.

出版信息

Sci Rep. 2019 Jul 17;9(1):10354. doi: 10.1038/s41598-019-46730-7.

Abstract

Two-dimensional (2D) semiconductors, such as transition metal dichalcogenides (TMDs) and black phosphorus, are the most promising channel materials for future electronics because of their unique electrical properties. Even though a number of 2D-materials-based logic devices have been demonstrated to date, most of them are a combination of more than two unit devices. If logic devices can be realized in a single channel, it would be advantageous for higher integration and functionality. In this study we report high-performance van der Waals heterostructure (vdW) ReS transistors with graphene electrodes on atomically flat hBN, and demonstrate a NAND gate comprising a single ReS transistor with split gates. Highly sensitive electrostatic doping of ReS enables fabrication of gate-tunable NAND logic gates, which cannot be achieved in bulk semiconductor materials because of the absence of gate tunability. The vdW heterostructure NAND gate comprising a single transistor paves a novel way to realize "all-2D" circuitry for flexible and transparent electronic applications.

摘要

二维(2D)半导体,如过渡金属二硫属化物(TMDs)和黑磷,因其独特的电学特性,是未来电子学中最具潜力的沟道材料。尽管迄今为止已经展示了许多基于二维材料的逻辑器件,但其中大多数是由两个以上的单元器件组合而成。如果逻辑器件能够在单个沟道中实现,那么对于更高的集成度和功能性将是有利的。在本研究中,我们报道了在原子级平整的hBN上具有石墨烯电极的高性能范德华异质结构(vdW)ReS晶体管,并展示了一个由具有分裂栅极的单个ReS晶体管组成的与非门。ReS的高灵敏度静电掺杂使得能够制造栅极可调的与非逻辑门,这在体半导体材料中由于缺乏栅极可调性而无法实现。由单个晶体管组成的vdW异质结构与非门为实现用于柔性和透明电子应用的“全二维”电路铺平了一条新途径。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/ce48/6637167/25ede220fd1f/41598_2019_46730_Fig1_HTML.jpg

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