IEEE Trans Biomed Circuits Syst. 2019 Oct;13(5):986-998. doi: 10.1109/TBCAS.2019.2929696. Epub 2019 Jul 22.
Internet-of-things applications that use machine-learning algorithms have increased the demand for application-specific energy-efficient hardware that can perform both learning and inference tasks to adapt to endpoint users or environmental changes. This paper presents a multilayer-learning neuromorphic system with analog-based multiplier-accumulator (MAC), which can learn training data by stochastic gradient descent algorithm. As a component of the proposed system, a current-mode MAC processor, fabricated in 28-nm CMOS technology, performs both forward and backward processing in a crossbar structure of 500 × 500 6-b transposable SRAM arrays. The proposed system is verified in a two-layer neural network by using two prototype chips and an FPGA. Without any calibration circuit for the analog-based MAC, the proposed system compensates for non-idealities from analog operations by learning training data with the analog-based MAC. With 1-b (+1, 0, -1) batch update of 6-b synaptic weights, the proposed system achieves a recognition rate of 96.6% with a peak energy efficiency of 2.99 TOPS/W (1 OP = one unsigned 8-b × signed 6-b MAC operation) in the classification of the MNIST dataset.
物联网应用中使用机器学习算法增加了对特定于应用的节能硬件的需求，这些硬件可以执行学习和推理任务，以适应端点用户或环境变化。本文提出了一种具有基于模拟的乘法器-累加器 (MAC) 的多层学习神经形态系统，它可以通过随机梯度下降算法学习训练数据。作为所提出系统的一部分，采用 28nmCMOS 技术制造的电流模式 MAC 处理器在 500×500 个 6b 可转换 SRAM 阵列的交叉结构中执行前向和后向处理。所提出的系统在两层神经网络中通过使用两个原型芯片和一个 FPGA 进行了验证。在没有用于模拟 MAC 的校准电路的情况下，所提出的系统通过使用基于模拟的 MAC 学习训练数据来补偿模拟操作的不准确性。在所提出的系统中，使用基于 1b（+1、0、-1）的 6b 突触权重批量更新，在 MNIST 数据集的分类中，达到了 96.6%的识别率，峰值能效为 2.99TOPS/W（1OP=一个无符号 8b× 有符号 6b MAC 操作）。
