一种具有部分低掺杂沟道的改进型4H-SiC MESFET

An Improved 4H-SiC MESFET with a Partially Low Doped Channel.

作者信息

Jia Hujun, Tong Yibo, Li Tao, Zhu Shunwei, Liang Yuan, Wang Xingyu, Zeng Tonghui, Yang Yintang

机构信息

School of Microelectronics, Xidian University, Xi'an 710071, China.

出版信息

Micromachines (Basel). 2019 Aug 23;10(9):555. doi: 10.3390/mi10090555.

DOI:10.3390/mi10090555

PMID:31443584

原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC6780564/

Abstract

An improved 4H-SiC metal semiconductor field effect transistor (MESFET) based on the double-recessed MESFET (DR-MESFET) for high power added efficiency (PAE) is designed and simulated in this paper and its mechanism is explored by co-simulation of ADS and ISE-TCAD software. This structure has a partially low doped channel (PLDC) under the gate, which increases the PAE of the device by decreasing the absolute value of the threshold voltage (), gate-source capacitance () and saturation current (). The simulated results show that with the increase of , the PAE of the device increases and then decreases when the value of is low enough. The doping concentration and thickness of the PLDC are respectively optimized to be = 1 × 10 cm and = 0.15 μm to obtain the best PAE. The maximum PAE obtained from the PLDC-MESFET is 43.67%, while the PAE of the DR-MESFET is 23.43%; the optimized PAE is increased by 86.38%.

摘要

本文设计并模拟了一种基于双凹槽金属半导体场效应晶体管（DR-MESFET）的改进型4H-SiC金属半导体场效应晶体管（MESFET），以实现高功率附加效率（PAE），并通过ADS和ISE-TCAD软件的联合仿真探索了其机理。该结构在栅极下方具有部分低掺杂沟道（PLDC），通过降低阈值电压（）、栅源电容（）和饱和电流（）的绝对值来提高器件的PAE。模拟结果表明，随着的增加，当的值足够低时，器件的PAE先增加后减小。对PLDC的掺杂浓度和厚度分别进行优化，使其分别为 = 1×10 cm和 = 0.15μm，以获得最佳PAE。PLDC-MESFET获得的最大PAE为43.67%，而DR-MESFET的PAE为23.43%；优化后的PAE提高了86.38%。