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通过 MoS 晶体管中的负电容效应实现持续的亚 60 mV/decade 切换。

Sustained Sub-60 mV/decade Switching via the Negative Capacitance Effect in MoS Transistors.

机构信息

Department of Electrical and Computer Engineering, Duke University , Durham, North Carolina 27708, United States.

Kurt J. Lesker, Company , Pittsburgh, Pennsylvania 15025, United States.

出版信息

Nano Lett. 2017 Aug 9;17(8):4801-4806. doi: 10.1021/acs.nanolett.7b01584. Epub 2017 Jul 12.

Abstract

It has been shown that a ferroelectric material integrated into the gate stack of a transistor can create an effective negative capacitance (NC) that allows the device to overcome "Boltzmann tyranny". While this switching below the thermal limit has been observed with Si-based NC field-effect transistors (NC-FETs), the adaptation to 2D materials would enable a device that is scalable in operating voltage as well as size. In this work, we demonstrate sustained sub-60 mV/dec switching, with a minimum subthreshold swing (SS) of 6.07 mV/dec (average of 8.03 mV/dec over 4 orders of magnitude in drain current), by incorporating hafnium zirconium oxide (HfZrO or HZO) ferroelectric into the gate stack of a MoS 2D-FET. By first fabricating and characterizing metal-ferroelectric-metal capacitors, the MoS is able to be transferred directly on top and characterized with both a standard and a negative capacitance gate stack. The 2D NC-FET exhibited marked enhancement in low-voltage switching behavior compared to the 2D-FET on the same MoS channel, reducing the SS by 2 orders of magnitude. A maximum internal voltage gain of ∼28× was realized with ∼12 nm thick HZO. Several unique dependencies were observed, including threshold voltage (V) shifts in the 2D NC-FET (compared to the 2D-FET) that correlate with source/drain overlap capacitance and changes in HZO (ferroelectric) and HfO (dielectric) thicknesses. Remarkable sub-60 mV/dec switching was obtained from 2D NC-FETs of various sizes and gate stack thicknesses, demonstrating great potential for enabling size- and voltage-scalable transistors.

摘要

已经表明,将铁电材料集成到晶体管的栅堆栈中可以创建有效的负电容(NC),从而使器件能够克服“玻尔兹曼暴政”。虽然这种低于热极限的开关已经在基于 Si 的 NC 场效应晶体管(NC-FET)中观察到,但适应 2D 材料将能够实现可在工作电压和尺寸上扩展的器件。在这项工作中,我们通过在 MoS2D-FET 的栅堆栈中集成 hafnium 锆氧化物(HfZrO 或 HZO)铁电体,证明了持续的低于 60 mV/dec 的开关,最小的亚阈值摆幅(SS)为 6.07 mV/dec(在 4 个数量级的漏电流中平均为 8.03 mV/dec)。通过首先制造和表征金属-铁电体-金属电容器,MoS 能够直接转移到顶部,并使用标准和负电容栅堆栈进行特性化。与同一 MoS 沟道上的 2D-FET 相比,2D NC-FET 表现出显著的降低 SS 幅度的增强的低电压开关特性,降低了 2 个数量级。使用约 12nm 厚的 HZO 实现了约 28×的最大内部电压增益。观察到了一些独特的依赖性,包括 2D NC-FET(与 2D-FET 相比)中的阈值电压(V)偏移,该偏移与源/漏重叠电容以及 HZO(铁电体)和 HfO(介电体)厚度的变化相关。从各种尺寸和栅堆栈厚度的 2D NC-FET 获得了显著的低于 60 mV/dec 的开关,这表明了实现尺寸和电压可扩展晶体管的巨大潜力。

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