Hu Jiadong, Shen Zhongtao, Liu Shubin, An Qi
State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China, Hefei 230026, China.
Rev Sci Instrum. 2021 Feb 1;92(2):024703. doi: 10.1063/5.0037067.
The detection of a high repetition rate weak signal is studied in this paper. Owing to the characteristics of the signal of interest, both high speed analog-to-digital converter (ADC) and low computational complexity data processing techniques are required for high speed real-time weak signal detection. In this paper, a novel field programmable gate array (FPGA) based high speed real-time periodic weak signal detection technique is presented. Cascaded comparators outside the FPGA and cascaded flip flops in the FPGA are used to implement a one-bit ADC, which performs quantization first followed by sampling. Based on this novel design, a time-interleaved structure with several sub-channels is further proposed to significantly improve the sampling rate of the one-bit ADC, which does not require calibration for offset, gain, and sample-time mismatches between sub-channels. Each sub-channel has a long-time coherent integration structure to coherently integrate the sampled one-bit data. A full layer clearance mechanism that only operates on specific bits of the integrated sums is proposed to overcome the influence of a noise baseline drift on the weak signal detection. Compared with the traditional adaptive threshold, this mechanism has a significantly lower computational complexity. A prototype with three sub-channels performing 1.5 Gs/s sampling is implemented to verify the proposed technique. The results obtained confirm its high sampling rate and noise baseline drift tolerance in weak signal detection.
本文研究了高重复率微弱信号的检测问题。由于感兴趣信号的特性，高速实时微弱信号检测需要高速模数转换器（ADC）和低计算复杂度的数据处理技术。本文提出了一种基于新型现场可编程门阵列（FPGA）的高速实时周期性微弱信号检测技术。FPGA外部的级联比较器和FPGA内部的级联触发器用于实现一位ADC，该ADC先进行量化然后采样。基于这种新颖设计，进一步提出了一种具有多个子通道的时间交织结构，以显著提高一位ADC的采样率，该结构不需要对子通道之间的失调、增益和采样时间失配进行校准。每个子通道都有一个长时间相干积分结构，用于对采样的一位数据进行相干积分。提出了一种仅对积分和的特定位进行操作的全层清除机制，以克服噪声基线漂移对微弱信号检测的影响。与传统的自适应阈值相比，该机制的计算复杂度显著降低。实现了一个具有三个子通道、采样速率为1.5 Gs/s的原型，以验证所提出的技术。获得的结果证实了其在微弱信号检测中的高采样率和对噪声基线漂移的容忍度。
