College of Intelligent Science and Technology, National University of Defense Technology, Deya Road 109, Kaifu District, Changsha 410073, China.
Math Biosci Eng. 2021 Oct 21;18(6):9050-9075. doi: 10.3934/mbe.2021446.
This article presents a method to calibrate a 16-channel 40 GS/s time-interleaved analog-to-digital converter (TI-ADC) based on channel equalization and Monte Carlo method. First, the channel mismatch is estimated by the Monte Carlo method, and equalize each channel to meet the calibration requirement. This method does not require additional hardware circuits, every channel can be compensated. The calibration structure is simple and the convergence speed is fast, besides, the ADC is worked in background mode, which does not affect the conversion. The prototype, implemented in 28 nm CMOS, reaches a 41 dB SFDR with an input signal of 1.2 GHz and 5 dBm after the proposed background offset and gain mismatch calibration. Compared with previous works, the spurious-free dynamic range (SFDR) and the effective number of bits (ENOB) are better, the estimation accuracy is higher, the error is smaller and the faster speed of convergence improves the efficiency of signal processing.
本文提出了一种基于通道均衡和蒙特卡罗方法校准 16 通道 40GS/s 时间交错模数转换器（TI-ADC）的方法。首先，通过蒙特卡罗方法估计通道失配，然后对每个通道进行均衡以满足校准要求。这种方法不需要额外的硬件电路，每个通道都可以进行补偿。校准结构简单，收敛速度快，此外，ADC 在后台模式下工作，不会影响转换。该原型采用 28nmCMOS 技术实现，在经过提出的背景偏置和增益失配校准后，对于 1.2GHz 的输入信号和 5dBm 的输入信号，可达到 41dB 的SFDR 和 5dB 的SFDR。与以往的工作相比，该方法的无杂散动态范围（SFDR）和有效位数（ENOB）更好，估计精度更高，误差更小，收敛速度更快，提高了信号处理的效率。
