Zhao Yu, Ye Peng, Yang Kuojun, Meng Jie, Lei Maolin
School of Automaton, University of Electronic Science and Technology of China, Chengdu 611731, People's Republic of China.
Rev Sci Instrum. 2021 Mar 1;92(3):034703. doi: 10.1063/5.0039666.
This paper studies the synchronization between the analog and digital local oscillators (LOs) in bandwidth-interleaved (BI) data acquisition systems (DAQS). It gives a detailed analysis of the random synchronization phase difference between the analog and digital LOs in the BI-DAQS among different acquisition frames. Exploiting the synchrony relation between the analog LO and sampling clock of the BI-DAQS, the synchronization between analog and digital LOs, where the digital LO is generated in the sampling clock domain, in each acquisition frame is realized in the Field Programmable Gate Array (FPGA). A BI-DAQS platform with a 5.5 GHz bandwidth and 20 Gs/s sampling rate is built to validate the proposed synchronization mechanism. Experimental results in the platform show the efficacy of the proposed synchronization mechanism, which consumes only a small amount of the flip-flops and look-up tables in the FPGA without any additional hardware assistance.
本文研究带宽交错（BI）数据采集系统（DAQ）中模拟与数字本地振荡器（LO）之间的同步。详细分析了BI-DAQ中不同采集帧之间模拟与数字LO的随机同步相位差。利用BI-DAQ模拟LO与采样时钟之间的同步关系，在现场可编程门阵列（FPGA）中实现了每个采集帧中模拟与数字LO之间的同步，其中数字LO在采样时钟域中生成。搭建了一个带宽为5.5 GHz、采样率为20 Gs/s的BI-DAQ平台，以验证所提出的同步机制。平台上的实验结果表明了所提出同步机制的有效性，该机制在FPGA中仅消耗少量触发器和查找表，无需任何额外硬件辅助。
