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在金属/半导体界面插入纯净石墨烯以最小化金属诱导的能隙态。

Pristine Graphene Insertion at the Metal/Semiconductor Interface to Minimize Metal-Induced Gap States.

作者信息

Park Jun-Ho, Yang Seong-Jun, Choi Chang-Won, Choi Si-Young, Kim Cheol-Joo

机构信息

Department of Chemical Engineering Pohang University of Science and Technology 77 Cheongam-Ro, Nam-Gu, Pohang 37673, Republic of Korea.

Department of Material Science & Engineering Pohang University of Science and Technology 77 Cheongam-Ro, Nam-Gu, Pohang 37673, Republic of Korea.

出版信息

ACS Appl Mater Interfaces. 2021 May 19;13(19):22828-22835. doi: 10.1021/acsami.1c03299. Epub 2021 May 5.

DOI:10.1021/acsami.1c03299
PMID:33950688
Abstract

Metal (M) contact with a semiconductor (S) introduces metal-induced gap states (MIGS), which makes it difficult to study the intrinsic electrical properties of S. A bilayer of metal with graphene (Gr), ., a M/Gr bilayer, may form a contact with S to minimize MIGS. However, it has been challenging to realize the pristine M/Gr/S junctions without interfacial contaminants, which result in additional interfacial states. Here, we successfully demonstrate the atomically clean M/Gr/-type silicon (Si) junctions via all-dry transfer of M/Gr bilayers onto Si. The fabricated M/Gr/Si junctions significantly increase the current density at reverse bias, compared to those of M/Si junctions without a Gr interlayer (e.g., by 10 times for M = Au in Si(111)). The increase of the reverse by a Gr interlayer is more prominent in Si(111) than in Si(100), whereas in M/Si junctions, is independent of the type of Si surface. The different transport data between M/Gr/Si(111) and M/Gr/Si(100) are consistent with Fermi-level pinning by different surface states of Si(111) and Si(100). Our findings suggest the effective way to suppress MIGS by an introduction of the clean Gr interlayer, which paves the way to study intrinsic electrical properties of various materials.

摘要

金属(M)与半导体(S)接触会引入金属诱导能隙态(MIGS),这使得研究S的本征电学性质变得困难。金属与石墨烯(Gr)的双层结构,即M/Gr双层结构,可能与S形成接触以最小化MIGS。然而,要实现无界面污染物的原始M/Gr/S结一直具有挑战性,因为这些污染物会导致额外的界面态。在此,我们通过将M/Gr双层结构全干法转移到Si上,成功展示了原子级清洁的M/Gr/ - 型硅(Si)结。与没有Gr中间层的M/Si结相比,所制备的M/Gr/Si结在反向偏压下显著提高了电流密度(例如,对于Si(111)中的M = Au,提高了10倍)。Gr中间层使反向电流增加在Si(111)中比在Si(100)中更显著,而在M/Si结中,电流与Si表面类型无关。M/Gr/Si(111)和M/Gr/Si(100)之间不同的传输数据与Si(111)和Si(100)不同表面态的费米能级钉扎一致。我们的发现表明,通过引入清洁的Gr中间层来抑制MIGS的有效方法,这为研究各种材料的本征电学性质铺平了道路。

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